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Add AMI CAN DBC and verified SDC/BMS firmware handoff

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shenlefengnai-rgb
2026-10-03 15:57:54 +08:00
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.gitattributes
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*.HMI binary
*.png binary
*.pdf binary
*.bin binary
*.dbc text eol=lf
*.md text eol=lf
*.py text eol=lf
*.txt text
# Keep vendor source and captured logs as supplied.
firmware/Drivers/** -whitespace
docs/evidence/**/*.log -whitespace
.gitignore
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/firmware/build/
/firmware/MXTmpFiles/
/tmp/
/firmware/.mxproject
/firmware/Drivers/CMSIS/Core/
/firmware/Drivers/CMSIS/docs/
/firmware/Drivers/CMSIS/DSP/
/firmware/Drivers/CMSIS/NN/
/firmware/Drivers/CMSIS/RTOS/
/firmware/Drivers/CMSIS/RTOS2/
__pycache__/
*.launch
*.bak
*.orig
AMI.HMI
BIN
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AMI.dbc
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VERSION "AMI-2.0-2026-10-03"
NS_ :
NS_DESC_
CM_
BA_DEF_
BA_
VAL_
BA_DEF_DEF_
BS_:
BU_: AMI VCU SDC_ACQ_DAC BMS
BO_ 768 AMI_TaskRequest: 8 AMI
SG_ Protocol_Version : 0|8@1+ (1,0) [1|1] "" VCU
SG_ Task_ID : 8|8@1+ (1,0) [1|6] "" VCU
SG_ Request_Sequence : 16|8@1+ (1,0) [0|255] "" VCU
SG_ Request_Source : 24|8@1+ (1,0) [1|1] "" VCU
SG_ MCU_Uptime : 32|32@1+ (1,0) [0|4294967295] "ms" VCU
BO_ 1696 SDC_Heartbeat: 8 SDC_ACQ_DAC
SG_ Board_Identifier : 0|8@1+ (1,0) [0|255] "" AMI
SG_ Protocol_Version : 8|8@1+ (1,0) [0|255] "" AMI
SG_ Heartbeat_Sequence : 16|16@1+ (1,0) [0|65535] "" AMI
SG_ Uptime : 32|32@1+ (0.001,0) [0|4294967.295] "s" AMI
BO_ 1697 SDC_ADC_InputVoltage: 2 SDC_ACQ_DAC
SG_ Input_Voltage : 0|16@1+ (0.001,0) [0|65.535] "V" AMI
BO_ 1698 SDC_InputFrequencies: 8 SDC_ACQ_DAC
SG_ Frequency_LeftFront_PA0 : 0|16@1+ (1,0) [0|65535] "Hz" AMI
SG_ Frequency_PA2 : 16|16@1+ (1,0) [0|65535] "Hz" AMI
SG_ Frequency_RightFront_PA6 : 32|16@1+ (1,0) [0|65535] "Hz" AMI
SG_ Frequency_PB14 : 48|16@1+ (1,0) [0|65535] "Hz" AMI
BO_ 1700 SDC_DAC_Ack: 4 SDC_ACQ_DAC
SG_ DAC_Set_Result : 0|8@1+ (1,0) [0|1] "" AMI
SG_ DAC_Select : 8|8@1+ (1,0) [1|2] "" AMI
SG_ DAC_Output_Voltage : 16|16@1+ (0.001,0) [0|5] "V" AMI
BO_ 1702 SDC_GPIO_Status: 8 SDC_ACQ_DAC
SG_ SDC_Input_State : 0|15@1+ (1,0) [0|32767] "" AMI
SG_ SDC_Changed_Mask : 16|15@1+ (1,0) [0|32767] "" AMI
SG_ Timestamp : 32|32@1+ (0.001,0) [0|4294967.295] "s" AMI
BO_ 320 BMS_Status: 8 BMS
SG_ Pack_Voltage : 7|16@0+ (0.1,0) [0|6553.5] "V" AMI
SG_ Pack_Current : 23|16@0+ (0.1,-500) [-500|6053.5] "A" AMI
BO_ 342 BMS_Temperatures: 8 BMS
SG_ Temperature_1 : 7|8@0+ (1,-40) [-40|215] "degC" AMI
SG_ Temperature_2 : 15|8@0+ (1,-40) [-40|215] "degC" AMI
SG_ Temperature_3 : 23|8@0+ (1,-40) [-40|215] "degC" AMI
SG_ Temperature_4 : 31|8@0+ (1,-40) [-40|215] "degC" AMI
SG_ Temperature_5 : 39|8@0+ (1,-40) [-40|215] "degC" AMI
SG_ Temperature_6 : 47|8@0+ (1,-40) [-40|215] "degC" AMI
SG_ Temperature_7 : 55|8@0+ (1,-40) [-40|215] "degC" AMI
SG_ Temperature_8 : 63|8@0+ (1,-40) [-40|215] "degC" AMI
BO_ 2556444915 BMS_Status_Extended: 8 BMS
SG_ Pack_Voltage : 7|16@0+ (0.1,0) [0|6553.5] "V" AMI
SG_ Pack_Current : 23|16@0+ (0.1,-500) [-500|6053.5] "A" AMI
BO_ 2556510451 BMS_Extremes_Extended: 8 BMS
SG_ Maximum_Cell_Temperature : 39|8@0+ (1,-40) [-40|215] "degC" AMI
CM_ "AMI CAN interface v2.0. Classic CAN at 500000 bit/s. CAN1 and CAN2 use identical IDs and parsing. SDC fields follow SDC_ACQ_DAC.dbc VERSION 1.1. BMS consumed fields follow BmsMonitor-CANTest commit e65c95203d1689df05343775982d7e85bd782646. Omitted bytes/signals are not interpreted by the AMI firmware. No motor temperature, calibrated vehicle speed, torque, task execution feedback or AMI heartbeat frame is defined.";
CM_ BU_ AMI "Instrument MCU. UART HMI task confirmation produces AMI_TaskRequest. Display values are received from SDC and BMS.";
CM_ BU_ VCU "Logical receiver of task selection requests; execution and safety interlocks are outside this AMI interface.";
CM_ BU_ SDC_ACQ_DAC "Source of ADC, capture frequencies and raw PD0-PD14 states; both SDC CAN ports carry the same protocol.";
CM_ BU_ BMS "Logical BMS source. Source frame periods are not specified here; do not infer them from test traffic.";
CM_ BO_ 768 "Standard ID 0x300, DLC 8. Event-driven: one request on valid HMI task confirmation, none on cancel. Counter wraps at 255. Request is not proof of execution and is not SDC ASSI_Lamp_Set (0x6A5). No CAN application-level acknowledgement is defined. Route to ports with valid RX within 500 ms; if none, attempt both.";
CM_ SG_ 768 Protocol_Version "Fixed 1.";
CM_ SG_ 768 Task_ID "Valid task values are 1 through 6.";
CM_ SG_ 768 Request_Sequence "Zero at MCU boot; increments after the request is queued on all target ports, modulo 256.";
CM_ SG_ 768 Request_Source "Fixed 1 = AMI HMI.";
CM_ SG_ 768 MCU_Uptime "Unsigned MCU HAL_GetTick milliseconds, little-endian. Natural uint32 wrap.";
CM_ BO_ 1696 "Standard ID 0x6A0, DLC 8, 100 ms. AMI accepts board identifier 0xA1 and protocol version 1.";
CM_ BO_ 1697 "Standard ID 0x6A1, DLC exactly 2, 500 ms. Calibrated input voltage before the SDC divider. AMI uses it exclusively as low-voltage battery voltage. Do not apply the divider again.";
CM_ SG_ 1697 Input_Voltage "On-wire uint16 mV, decoded in V. dash.lvbat uses 0.01 V integer display units: (raw_mV + 5) / 10. Source expires after 1500 ms.";
CM_ BO_ 1698 "Standard ID 0x6A2, DLC 8, 20 ms. Preserve Hz; wheel circumference and pulses per revolution are undefined, so AMI does not convert to km/h.";
CM_ BO_ 1700 "Standard ID 0x6A4, DLC 4. Response to a DAC command. AMI recognizes the frame but does not update a display value from it.";
CM_ BO_ 1702 "Standard ID 0x6A6, DLC 8. Sent at startup and on PD0-PD14 changes, not periodically. AMI stores raw state, change mask and timestamp. No mapping to named d0-d15 safety signals or normal polarity is defined.";
CM_ SG_ 1702 SDC_Input_State "Bit n maps directly to PDn for n=0..14. Bits 15 and 31 in the payload are unused.";
CM_ SG_ 1702 SDC_Changed_Mask "Bit n indicates PDn changed since the preceding GPIO status frame.";
CM_ BO_ 320 "Standard ID 0x140, DLC 8. AMI consumes only bytes 0..3: big-endian unsigned voltage and offset unsigned current. Other payload bytes are outside this DBC subset. Display rounds voltage/current to whole V/A; source expires after 2000 ms.";
CM_ SG_ 320 Pack_Current "Current = raw_uint16 * 0.1 - 500 A; raw 5000 is zero current. This is not a signed int16 field.";
CM_ BO_ 342 "Standard ID 0x156, DLC 8. Eight actual temperature channels. Raw 0xFF is invalid, not 215 degC. AMI takes the maximum of valid channels only; all invalid clears validity. Maximum is derived, not another on-wire signal. Source expires after 2000 ms.";
CM_ SG_ 342 Temperature_1 "Raw byte 0xFF is invalid. Numeric decoders with choices disabled may return 215; check the raw sentinel before aggregation.";
CM_ SG_ 342 Temperature_2 "Raw byte 0xFF is invalid.";
CM_ SG_ 342 Temperature_3 "Raw byte 0xFF is invalid.";
CM_ SG_ 342 Temperature_4 "Raw byte 0xFF is invalid.";
CM_ SG_ 342 Temperature_5 "Raw byte 0xFF is invalid.";
CM_ SG_ 342 Temperature_6 "Raw byte 0xFF is invalid.";
CM_ SG_ 342 Temperature_7 "Raw byte 0xFF is invalid.";
CM_ SG_ 342 Temperature_8 "Raw byte 0xFF is invalid. Synthetic channels 9/10 from the reference UI are not on-wire channels.";
CM_ BO_ 2556444915 "Extended arbitration ID 0x186040F3, DLC 8. Same consumed voltage/current layout as standard 0x140. DBC BO_ numeric ID includes the extended-frame flag 0x80000000.";
CM_ SG_ 2556444915 Pack_Current "Current = raw_uint16 * 0.1 - 500 A.";
CM_ BO_ 2556510451 "Extended arbitration ID 0x186140F3, DLC 8. AMI consumes byte 4 as maximum cell temperature. Raw 0xFF is invalid. Other bytes, including BMS low-voltage bytes 6..7, are not used and cannot override SDC ADC. DBC BO_ numeric ID includes 0x80000000.";
VAL_ 768 Protocol_Version 1 "Version_1";
VAL_ 768 Task_ID 1 "Skidpad" 2 "Acceleration" 3 "Autocross" 4 "Inspection_Test" 5 "EBS_Test" 6 "Manual_Driving";
VAL_ 768 Request_Source 1 "AMI_HMI";
VAL_ 1696 Board_Identifier 161 "A11_F407";
VAL_ 1696 Protocol_Version 1 "Version_1";
VAL_ 1700 DAC_Set_Result 0 "Failed" 1 "OK";
VAL_ 1700 DAC_Select 1 "DAC1" 2 "DAC2";
VAL_ 342 Temperature_1 255 "Invalid";
VAL_ 342 Temperature_2 255 "Invalid";
VAL_ 342 Temperature_3 255 "Invalid";
VAL_ 342 Temperature_4 255 "Invalid";
VAL_ 342 Temperature_5 255 "Invalid";
VAL_ 342 Temperature_6 255 "Invalid";
VAL_ 342 Temperature_7 255 "Invalid";
VAL_ 342 Temperature_8 255 "Invalid";
VAL_ 2556510451 Maximum_Cell_Temperature 255 "Invalid";
BA_DEF_ "BusType" STRING;
BA_DEF_ "Baudrate" INT 0 1000000;
BA_DEF_ BO_ "GenMsgCycleTime" INT 0 2147483647;
BA_DEF_DEF_ "BusType" "CAN";
BA_DEF_DEF_ "Baudrate" 500000;
BA_DEF_DEF_ "GenMsgCycleTime" 0;
BA_ "BusType" "CAN";
BA_ "Baudrate" 500000;
BA_ "GenMsgCycleTime" BO_ 1696 100;
BA_ "GenMsgCycleTime" BO_ 1697 500;
BA_ "GenMsgCycleTime" BO_ 1698 20;
README.md
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YMR A11 仪表，使用淘晶驰 TJC4827X543_011 串口屏，分辨率 480 × 272。 YMR A11 仪表，使用淘晶驰 TJC4827X543_011 串口屏，分辨率 480 × 272。
当前通讯协议为 **v1.2（新增低压电池电压）**，工程使用 USART HMI 1.68.1.3037 编辑、编译。 当前 MCU CAN 输入为 **v2.0（SDC DBC / BMS 适配，2026-10-03）**，屏幕沿用 debug 数字状态接口；工程使用 USART HMI 1.68.1.3037 编辑、编译。
dash 顶部已加入低压电池电压 `lvbat`（两位小数），来源是 SDC `0x6A1` ADC mV。高压电压、电流来自 BMS `0x140` / 扩展 `0x186040F3`，现有控件显示整数单位；最高单体温度取 `0x156` 的有效实际温度最大值，或扩展 `0x186140F3`。旧 `0x180 / 0x181 / 0x280` 输入不再使用。
## 工程与交接资料 ## 工程与交接资料
- [AMI.dbc](AMI.dbc)：当前 AMI CAN 接口，10 条报文、33 个信号，含标准/扩展帧。
- [DBC 对应说明](docs/AMI_CAN_DBC说明.md)：信号布局、枚举、字节序、样例与复现检查。
- [联调报告](docs/SDC_BMS联调报告.md)：真实 CAN1 / MCU / COM4 到 HMI 调试器的证据。
- [已联调固件 BIN](output/firmware/AMI_Controller.bin)：STM32G0B1CBT6，配套源码在 firmware。
- [AMI.HMI](AMI.HMI)：最新版屏幕工程，打开后编译并下载到对应型号屏幕。 - [AMI.HMI](AMI.HMI)：最新版屏幕工程，打开后编译并下载到对应型号屏幕。
- [通讯交接文档](docs/通讯交接文档.md)：可编辑协议说明，包含全部状态编号、任务帧、主页面属性及联调步骤。 - [通讯交接文档](docs/通讯交接文档.md)：可编辑协议说明，包含全部状态编号、任务帧、主页面属性及联调步骤。
- [PDF 文档](docs/AMI仪表通讯交接文档.pdf)：适合直接转交接手者的 5 页版本。 - [历史屏幕接口 PDF](docs/AMI仪表通讯交接文档.pdf)：保留的 v1.2 屏幕接口资料；当前 CAN 与有效性定义以 DBC 对应说明和 Markdown 交接文档为准。
- [C 发送示例](examples/ami_debug_send.c)：主控更新 debug 状态的参考函数。 - [C 发送示例](examples/ami_debug_send.c)：主控更新 debug 状态的参考函数。
- [验证说明](docs/验证说明.txt)：已完成检查和实物验证范围。 - [验证说明](docs/验证说明.txt)：已完成检查和实物验证范围。
- [STM32 HAL 固件](firmware/README.md)：STM32G0B1CBT6、双 FDCAN、USART2 DMA 和状态灯实现。
- [SDC / BMS 协议](docs/SDC_BMS协议.md)：当前 CAN ID、字节序、缩放、失效和任务回传定义。
- [旧 CAN / UART 协议](docs/CAN_UART协议.md)：历史自定义 CAN 输入，当前固件不再使用。
## 最小通讯示例 ## 最小通讯示例
@@ -40,8 +49,8 @@ dash.lvbat.val=1260
工程编译通过：0 错误、0 警告。模拟器已验证状态转换、跨页更新和 `d1` 双位置同步；任务回传此前已做模拟检查。 工程编译通过：0 错误、0 警告。模拟器已验证状态转换、跨页更新和 `d1` 双位置同步；任务回传此前已做模拟检查。
新增低压电压已在模拟器验证 `1260 → 12.60 V`，并验证在 debug 页更新 `1185` 后返回 dash 显示 `11.85 V`。 2026-10-03 已验证 CAN 盒 → 实物 AMI CAN1 / MCU → USART2 / COM4 → 官方 HMI 调试器的数据更新、失效与恢复。固件编译及烧录校验通过；物理串口屏和 CAN2 尚未接线实测。旧 C 示例仍是屏幕 debug 接口示例。
实际屏幕、串口和主控尚未联机验证，C 示例尚未在目标主控工程编译。主页面部分数值的单位和缩放仍需与主控统一。任务执行裁决、VCU 通知、EBS 灯及 ECUBACK 安全输出由主控实现；仪表显示不能作为执行成功或安全回路导通的证明。 灰色数值表示未知或失效。现有资料缺少电机/逆变器温度协议、Hz 到 km/h 标定参数、SDC PD0..PD14 到具名安全信号的映射，对应显示保持无效/未知。VCU 任务裁决、执行反馈和 EBS 安全输出仍需车辆控制协议，画面 EBS 文案不能作为安全状态证明。
许可证沿用仓库中的 [AGPL-3.0](LICENSE)。 许可证沿用仓库中的 [AGPL-3.0](LICENSE)。
docs/AMI_CAN_DBC说明.md
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# AMI CAN DBC 说明
版本：`AMI-2.0-2026-10-03`。由 [AMI.dbc](../AMI.dbc) 自动生成，10 条报文、33 个信号。
## 使用范围
CAN1 / CAN2 功能相同，均为 500 kbit/s、Classic CAN、87.5% 采样点。节点 AMI 为仪表 MCU，VCU 为任务请求的逻辑接收者，SDC_ACQ_DAC 和 BMS 为数据源。
本 DBC 包含 AMI 唯一发送的 `0x300` 任务请求，以及 AMI 当前识别的 SDC / BMS 输入。SDC `0x6A3` DAC 控制、`0x6A5` ASSI 控制、BMS 其他电芯/故障字段不属于此接口子集。没有定义电机温度、逆变器温度、扭矩、标定后的车速、AMI 周期心跳或 VCU 执行反馈。旧 `0x180 / 0x181 / 0x280` 输入已停用。
SDC 字段依据 `SDC_ACQ_DAC.dbc` VERSION 1.1，保持其信号名、位布局、缩放和单位；仅将输入接收节点设为 AMI。BMS 字段依据 [BmsMonitor-CANTest](https://git.acetaffy.ltd/acetaffy/BmsMonitor-CANTest) 提交 `e65c95203d1689df05343775982d7e85bd782646` 的 `BmsProtocolParser.cs`。
DBC 为 ASCII 编码，注释和枚举使用英文，便于导入 CAN 工具；本文为 UTF-8 中文。物理值 = 原始无符号值 × Factor + Offset；下表范围为编码范围，不表示车辆正常工作范围。
## 报文总览
| CAN ID | 类型 | DLC | 报文名 | 方向和作用 | 周期 / 触发 |
| --- | --- | --- | --- | --- | --- |
| `0x300` | 标准 | 8 | `AMI_TaskRequest` | AMI -> VCU：用户确认后的任务选择请求 | 确认任务触发 |
| `0x6A0` | 标准 | 8 | `SDC_Heartbeat` | SDC -> AMI：板标识、版本、序号、上电时间 | 100 ms |
| `0x6A1` | 标准 | 2 | `SDC_ADC_InputVoltage` | SDC -> AMI：低压电池电压，精确 DLC=2 | 500 ms |
| `0x6A2` | 标准 | 8 | `SDC_InputFrequencies` | SDC -> AMI：PA0 / PA2 / PA6 / PB14 原始频率 | 20 ms |
| `0x6A4` | 标准 | 4 | `SDC_DAC_Ack` | SDC -> AMI：DAC 设置应答，识别但不显示 | DAC 设置后应答 |
| `0x6A6` | 标准 | 8 | `SDC_GPIO_Status` | SDC -> AMI：PD0..PD14 原始电平和变化掩码 | 启动 / 电平变化 |
| `0x140` | 标准 | 8 | `BMS_Status` | BMS -> AMI：高压总电压、带偏置的总电流 | 源协议未指定 |
| `0x156` | 标准 | 8 | `BMS_Temperatures` | BMS -> AMI：八路实际温度，AMI 派生最高有效温度 | 源协议未指定 |
| `0x186040F3` | 扩展 | 8 | `BMS_Status_Extended` | BMS -> AMI：高压总电压、总电流扩展帧别名 | 源协议未指定 |
| `0x186140F3` | 扩展 | 8 | `BMS_Extremes_Extended` | BMS -> AMI：最高单体温度；不使用 BMS 低压字段 | 源协议未指定 |
扩展帧在 DBC 的 `BO_` 十进制 ID 中设置 bit31：`0x186040F3 -> 2556444915`，`0x186140F3 -> 2556510451`。CAN 工具中使用实际 29 位仲裁 ID 并选择扩展帧；bit31 不是总线上发送的仲裁 ID。
`GenMsgCycleTime` 仅填写已确认的 SDC 周期 100 / 500 / 20 ms。其余帧未填写周期，默认 0 表示未指定，不据此推断 BMS 周期。
## 信号布局
Start 为 DBC 起始位，位号从 0 开始。Intel `@1` 从最低有效位起算；Motorola `@0` 从最高有效位起算。例如 BMS 的 `7|16@0+` 对应字节 0..1 大端无符号数，`23|16@0+` 对应字节 2..3。单字节温度的字节序不改变实际解码。
### 0x300 - AMI_TaskRequest
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `Protocol_Version` | 0 | 8 | Intel | 1 | 0 | - | 1..1 |
| `Task_ID` | 8 | 8 | Intel | 1 | 0 | - | 1..6 |
| `Request_Sequence` | 16 | 8 | Intel | 1 | 0 | - | 0..255 |
| `Request_Source` | 24 | 8 | Intel | 1 | 0 | - | 1..1 |
| `MCU_Uptime` | 32 | 32 | Intel | 1 | 0 | ms | 0..4.29497e+09 |
`Protocol_Version`：1 = Version_1；`Task_ID`：1 = Skidpad，2 = Acceleration，3 = Autocross，4 = Inspection_Test，5 = EBS_Test，6 = Manual_Driving；`Request_Source`：1 = AMI_HMI。
### 0x6A0 - SDC_Heartbeat
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `Board_Identifier` | 0 | 8 | Intel | 1 | 0 | - | 0..255 |
| `Protocol_Version` | 8 | 8 | Intel | 1 | 0 | - | 0..255 |
| `Heartbeat_Sequence` | 16 | 16 | Intel | 1 | 0 | - | 0..65535 |
| `Uptime` | 32 | 32 | Intel | 0.001 | 0 | s | 0..4.29497e+06 |
`Board_Identifier`：161 = A11_F407；`Protocol_Version`：1 = Version_1。
### 0x6A1 - SDC_ADC_InputVoltage
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `Input_Voltage` | 0 | 16 | Intel | 0.001 | 0 | V | 0..65.535 |
### 0x6A2 - SDC_InputFrequencies
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `Frequency_LeftFront_PA0` | 0 | 16 | Intel | 1 | 0 | Hz | 0..65535 |
| `Frequency_PA2` | 16 | 16 | Intel | 1 | 0 | Hz | 0..65535 |
| `Frequency_RightFront_PA6` | 32 | 16 | Intel | 1 | 0 | Hz | 0..65535 |
| `Frequency_PB14` | 48 | 16 | Intel | 1 | 0 | Hz | 0..65535 |
### 0x6A4 - SDC_DAC_Ack
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `DAC_Set_Result` | 0 | 8 | Intel | 1 | 0 | - | 0..1 |
| `DAC_Select` | 8 | 8 | Intel | 1 | 0 | - | 1..2 |
| `DAC_Output_Voltage` | 16 | 16 | Intel | 0.001 | 0 | V | 0..5 |
`DAC_Set_Result`：0 = Failed，1 = OK；`DAC_Select`：1 = DAC1，2 = DAC2。
### 0x6A6 - SDC_GPIO_Status
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `SDC_Input_State` | 0 | 15 | Intel | 1 | 0 | - | 0..32767 |
| `SDC_Changed_Mask` | 16 | 15 | Intel | 1 | 0 | - | 0..32767 |
| `Timestamp` | 32 | 32 | Intel | 0.001 | 0 | s | 0..4.29497e+06 |
### 0x140 - BMS_Status
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `Pack_Voltage` | 7 | 16 | Motorola | 0.1 | 0 | V | 0..6553.5 |
| `Pack_Current` | 23 | 16 | Motorola | 0.1 | -500 | A | -500..6053.5 |
### 0x156 - BMS_Temperatures
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `Temperature_1` | 7 | 8 | Motorola | 1 | -40 | degC | -40..215 |
| `Temperature_2` | 15 | 8 | Motorola | 1 | -40 | degC | -40..215 |
| `Temperature_3` | 23 | 8 | Motorola | 1 | -40 | degC | -40..215 |
| `Temperature_4` | 31 | 8 | Motorola | 1 | -40 | degC | -40..215 |
| `Temperature_5` | 39 | 8 | Motorola | 1 | -40 | degC | -40..215 |
| `Temperature_6` | 47 | 8 | Motorola | 1 | -40 | degC | -40..215 |
| `Temperature_7` | 55 | 8 | Motorola | 1 | -40 | degC | -40..215 |
| `Temperature_8` | 63 | 8 | Motorola | 1 | -40 | degC | -40..215 |
`Temperature_1`：255 = Invalid；`Temperature_2`：255 = Invalid；`Temperature_3`：255 = Invalid；`Temperature_4`：255 = Invalid；`Temperature_5`：255 = Invalid；`Temperature_6`：255 = Invalid；`Temperature_7`：255 = Invalid；`Temperature_8`：255 = Invalid。
### 0x186040F3 - BMS_Status_Extended
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `Pack_Voltage` | 7 | 16 | Motorola | 0.1 | 0 | V | 0..6553.5 |
| `Pack_Current` | 23 | 16 | Motorola | 0.1 | -500 | A | -500..6053.5 |
### 0x186140F3 - BMS_Extremes_Extended
| 信号 | Start | 位数 | 字节序 | Factor | Offset | 单位 | 编码范围 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| `Maximum_Cell_Temperature` | 39 | 8 | Motorola | 1 | -40 | degC | -40..215 |
`Maximum_Cell_Temperature`：255 = Invalid。
## AMI 任务请求语义
| Task_ID | 任务 |
| --- | --- |
| 1 | 八字绕环 |
| 2 | 直线加速 |
| 3 | 高速循迹 |
| 4 | 车检测试 |
| 5 | EBS 测试 |
| 6 | 手动驾驶 |
用户确认时，屏幕通过串口发送 `AA 55 01 NN 0D 0A`，MCU 才产生 CAN `0x300` 请求；取消不产生请求。Protocol_Version 和 Request_Source 固定为 1；Request_Sequence 从 MCU 启动后的 0 开始，在各目标口完成入队后加一，255 后回到 0。MCU_Uptime 为请求入队时的 `HAL_GetTick()` 毫秒值，小端 uint32，自然回绕。
优先发送到最近 500 ms 内收到过有效协议报文的 CAN 口；两路活跃则发送两路；没有活跃口时尝试两路。若未连接端口自动重发导致 TX FIFO 填满，现有队列可能等待。该策略沿用当前固件。任务表示操作员请求，VCU 负责裁决和安全互锁；未定义应用层执行确认、运行完成、故障回传，也不把任务号换成 ASSI 灯状态。
## 显示缩放与失效规则
| 显示项 | 输入和显示规则 | 失效条件 |
| --- | --- | --- |
| 低压电池 | `0x6A1` uint16 mV；`lvbat.val=(mV+5)/10`，显示两位小数 V | 1500 ms 无有效 ADC |
| 高压电压 | BMS 大端 uint16 × 0.1 V；现有控件四舍五入到整数 V | 2000 ms 无有效 BMS 状态 |
| 高压电流 | BMS 大端 uint16 × 0.1 - 500 A；四舍五入到整数 A | 2000 ms 无有效 BMS 状态 |
| 最高单体温度 | `0x156` 有效通道最大值，或扩展帧字节 4 - 40 | 全无效或 2000 ms 无有效温度源 |
电流字段是带偏置的 uint16，不能按 int16 解码。温度原始 `0xFF` 为无效；DBC 枚举将其标为 Invalid。关闭枚举解码的工具可能显示 215，聚合时必须先排除 原始 255，不能把它当作 215 ℃。有效实际温度范围为 -40..214 ℃。第 9/10 路虚拟温度没有总线字段，最高温度也属于 MCU 派生结果，不新增虚构信号。
BMS 扩展帧的其他字段没有纳入本 DBC，尤其字节 6..7 的低压电压不覆盖 SDC ADC。两类温度帧共用最高温度显示，后收到的温度帧更新该显示及有效性。SDC GPIO 原始电平尚无具名安全信号映射和正常极性，因此 debug 保持未知；轮频 Hz 尚无周长和每圈脉冲数，不能直接当 km/h。
有效值显示白色；未知、无效、超时显示深灰色，历史数值保留但不作为有效测量。各源独立超时，其他流量不续期。每 5 秒重新同步界面，刚连接需等待首轮同步。
## 报文样例
| ID / DLC | 数据（十六进制） | 解码及仪表显示 |
| --- | --- | --- |
| `0x300 / 8` | `01 02 00 01 E8 03 00 00` | 直线加速请求、序号 0、来源 AMI、上电 1000 ms |
| `0x6A1 / 2` | `0C 30` | ADC 12300 mV；低压 12.30 V |
| `0x6A2 / 8` | `32 00 64 00 96 00 C8 00` | PA0 / PA2 / PA6 / PB14：50 / 100 / 150 / 200 Hz |
| `0x140 / 8` | `0F A0 14 03 00 00 00 05` | 400.0 V / +12.3 A；显示 400 / 12 |
| `0x186040F3 / 8` 扩展 | `10 73 10 D1 00 00 00 05` | 421.1 V / -69.5 A；显示 421 / -70 |
| `0x156 / 8` | `42 FF 43 47 37 0A 50 41` | 第二路无效，有效最高温度 40 ℃ |
| `0x186140F3 / 8` 扩展 | `10 04 0C E4 3F 17 00 7B` | 最高温度 23 ℃；BMS 低压字段不使用 |
## 验证和复现
在仓库根目录运行：
```powershell
python -m pip install -r scripts/requirements.txt
python scripts/verify_dbc.py
python scripts/export_dbc_docs.py --check
# 若同时检出 SDC 仓库，可额外比较五条输入帧的原始布局：
python scripts/verify_dbc.py --sdc-dbc ../SDC_ACQ_DAC/SDC_ACQ_DAC.dbc
```
校验覆盖严格 DBC 解析（长度、信号越界与重叠）、10 个 ID 与固件宏对应、标准/扩展格式、33 个信号、发送/接收节点、SDC 周期、24 个已知报文解码、六个任务号与计数边界编码、大端偏置电流、无效温度枚举、全负温度和截短 DLC。已安装并验证 cantools 44.1.0，接口参考 [cantools 官方文档](https://cantools.readthedocs.io/en/latest/)。
上述是静态及软件编解码验证。之前 CAN 盒 -> 实物 AMI CAN1 / MCU -> USART2 -> COM4 -> 官方 HMI 调试器的实际更新和六个任务回传见 [联调报告](SDC_BMS联调报告.md)。物理串口屏、CAN2 接线、真实 SDC/BMS 节点和车辆执行动作尚未实测；文档生成和 DBC 解析不替代这些测试。
修改 AMI.dbc 后运行 `python scripts/export_dbc_docs.py` 更新本文；固件字节布局、DBC 与此文档需同时保持一致。
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# AMI 主控 CAN / UART 协议
**2026-10-03：本文 v1.0 CAN 输入已停用，当前固件协议见 [SDC_BMS协议.md](SDC_BMS协议.md)。** 原 `0x180 / 0x181 / 0x280` 仅留作历史记录；UART 和 `0x300` 任务接口仍保留，当前有效性规则以新文档为准。
版本：1.0（2026-09-30）
两路 CAN 功能完全相同，均接收全部仪表/安全状态并可发送任务请求。所有报文均为 11 位标准 ID、Classic CAN 数据帧、Intel/Little-Endian；FDCAN1、FDCAN2 均为 500 kbit/s、87.5% 采样点。
## 1. CAN1 / CAN2：车辆数据与任务请求
### 0x180 仪表快速量（CAN → 主控，8 字节）
| 字节 | 类型 | 信号 | 比例 | 屏幕目标 |
| --- | --- | --- | --- | --- |
| 0..1 | uint16 | 车速 | 0.1 km/h/bit | `dash.speed.val`，四舍五入到 1 km/h |
| 2..3 | uint16 | 高压电压 | 0.1 V/bit | `dash.ts.val`，四舍五入到 1 V |
| 4..5 | int16 | 高压电流 | 0.1 A/bit | `dash.dl.val`，四舍五入到 1 A |
| 6..7 | int16 | 扭矩千分比 | 1 ‰/bit | `dash.mct.val` |
建议发送周期 10～20 ms。主控只把发生变化后的最新值送到屏幕；屏幕串口慢于 CAN 时，中间旧值会被合并丢弃，保证画面跟随最新状态。
示例：`7B 00 B8 0B CE FF F4 01` 表示 12.3 km/h、300.0 V、-5.0 A、500 ‰。
### 0x181 温度量（CAN → 主控，8 字节）
| 字节 | 类型 | 信号 | 比例 | 屏幕目标 |
| --- | --- | --- | --- | --- |
| 0..1 | int16 | 电机温度 | 0.1 °C/bit | `dash.djwd.val`，四舍五入到 1 °C |
| 2..3 | int16 | MCU/逆变器温度 | 0.1 °C/bit | `dash.mcuwd.val`，四舍五入到 1 °C |
| 4..5 | int16 | 最高单体温度 | 0.1 °C/bit | `dash.dtwd.val`，四舍五入到 1 °C |
| 6..7 | - | 保留 | 必须发送 0 | - |
建议发送周期 50～100 ms。
### 0x300 任务请求（主控 → CAN，8 字节）
主控只在收到屏幕合法确认帧后发送。它表示驾驶员/操作员请求，不表示车辆已经执行，VCU 仍须完成状态机和安全互锁判断。
| 字节 | 含义 |
| --- | --- |
| 0 | 协议版本，固定 1 |
| 1 | 任务号：1 八字绕环、2 直线加速、3 高速循迹、4 车检测试、5 EBS 测试、6 手动驾驶 |
| 2 | 请求序号，每次合法请求加 1，0～255 循环 |
| 3 | 来源，固定 1=AMI 屏幕 |
| 4..7 | 主控 `HAL_GetTick()` 毫秒值，uint32，小端 |
任务请求发送到最近 500 ms 内收到过本协议报文的 CAN 口；两路都活跃时发送到两路。如果两路都尚未收到报文，则尝试发送到两路。若 TX FIFO 暂满，任务保留在软件队列中稍后发送。
## 2. CAN1 / CAN2：安全/debug 状态
### 0x280 安全状态（CAN → 主控，8 字节）
字节 0..3 是 16 个 2 bit 状态，`d0` 位于 bit 1:0，`d15` 位于 bit 31:30：
```text
state[n] = (payload_u32 >> (2*n)) & 0x03
```
状态定义：0=未知、1=正常、2=故障；收到 3 时按未知处理。字节 4 可放发送方滚动计数，字节 5..7 保留，当前主控不解析。`d0～d15` 的物理含义沿用 [通讯交接文档.md](通讯交接文档.md)。建议发送周期 20～100 ms。
任一路收到 0x280 都会刷新状态。超过 500 ms 两路均未收到 0x280，主控会将全部 `d0～d15` 刷为 0（未知）。超过 500 ms 两路均未收到仪表帧时保留最后显示值，但点亮故障状态灯。
## 3. 主控与 TJC 屏幕串口
USART2 为 9600、8 数据位、无校验、1 停止位。
主控到屏幕使用 ASCII 属性赋值，每条命令后紧跟三个真实 `0xFF` 字节。例如车速 30 km/h：
```text
64 61 73 68 2E 73 70 65 65 64 2E 76 61 6C 3D 33 30 FF FF FF
```
屏幕到主控沿用现有 6 字节任务帧：
```text
AA 55 01 NN 0D 0A
```
`NN=01～06`。接收器按连续字节流搜索帧头并校验类型、任务号和帧尾，不依赖一次 DMA 回调刚好收到一帧。屏幕上电数据和官方 `bkcmd` 返回不会被误认为任务请求。
## 4. LED 与延迟边界
- PA0/脚 11：运行心跳，每 500 ms 翻转。
- PA1/脚 12：两路均未及时提供仪表量或 debug 状态时点亮；不要求两个接口必须同时连接。
- 两灯默认高电平有效，可在 `ami_app.h` 中切换极性。
- CAN 接收与 UART 收发均为中断/DMA；应用主循环不做阻塞等待。
- 屏幕链路物理上限由 9600 bit/s 决定：一条约 15～22 字节的赋值命令通常占用约 16～23 ms 线速时间。突发多字段更新会依次发送，但每个字段只保留最新值。
## 5. 验证边界
已验证：CubeMX 6.15 生成成功；GNU Arm GCC 13.3.1 Debug/Release 可编译；引脚复用、CAN 位时序和 UART 9600 配置进入生成代码。
未验证：实物芯片具体容量、LED 极性、CAN 收发器、终端电阻、整车实际波特率、屏幕电平、UART 实收发、任务按钮到 CAN 的端到端时延及车辆安全动作。烧录成功也不能替代这些实物测试。
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# AMI 接入 SDC / BMS 协议
版本 2.0，2026-10-03。CAN1 / CAN2 配置相同：500 kbit/s、Classic CAN、87.5% 采样点。当前固件不再接收旧 `0x180 / 0x181 / 0x280` 数据接口。
来源：`SDC_ACQ_DAC/SDC_ACQ_DAC.dbc` VERSION 1.1；[BmsMonitor-CANTest](https://git.acetaffy.ltd/acetaffy/BmsMonitor-CANTest) 的 `BmsMonitor.App/Protocol/BmsProtocolParser.cs`，核对提交 `e65c95203d1689df05343775982d7e85bd782646`，本机核对副本保存在 `tmp/BmsMonitor-CANTest`（不提交）；远端来源使用上述仓库及提交号定位。
## SDC 输入
| 标准 ID / DLC | 字节布局 | AMI 行为 |
| --- | --- | --- |
| `0x6A0 / 8` | `A1 01` + 小端 uint16 序号 + 小端 uint32 上电 ms | 校验标识和版本，刷新 SDC 心跳 |
| `0x6A1 / 2` | 小端 uint16 mV | **低压电池电压**，`dash.lvbat.val=(mV+5)/10`，虚拟浮点显示两位小数 |
| `0x6A2 / 8` | 四个小端 uint16 Hz，PA0 / PA2 / PA6 / PB14 | 保存原始频率；没有周长和每圈脉冲数，不直接当 km/h |
| `0x6A4 / 4` | 结果、DAC 选择、小端 uint16 mV | 接收应答，不作为仪表电压 |
| `0x6A6 / 8` | 小端 uint16 PD0..PD14 电平 + uint16 变化掩码 + uint32 ms | 保存原始电平、变化和时间 |
`0x6A3` DAC 设置和 `0x6A5` ASSI 设置是发给 SDC 的控制，不属于本次显示输入。ADC 已由 SDC 校准为分压前物理输入电压，AMI 不再乘分压倍数。`08 20` = 8200 mV = 8.20 V；`0C 30` = 12300 mV = 12.30 V。DLC 必须为 2。
GPIO 帧仅在启动和电平变化时发送，持续心跳表示源仍在线。DBC 没有 PD0..PD14 对应 `d0..d15` 安全信号的名称及正常极性；当前具名 debug 保持未知，不把高/低电平直接判为正常/故障。
## BMS 输入
| ID / DLC | 字段及换算 | 屏幕目标 |
| --- | --- | --- |
| 标准 `0x140 / 8` 或扩展 `0x186040F3 / 8` | 大端 uint16 字节 0..1 × 0.1 V | `dash.ts.val`，现有整数控件四舍五入至 1 V |
| 同上 | 大端 **uint16** 字节 2..3 × 0.1 − 500 A | `dash.dl.val`，四舍五入至 1 A；不是 int16 直接解码 |
| 标准 `0x156 / 8` | 八个字节分别为温度 + 40，`FF` 无效 | `dash.dtwd.val` = 有效实际通道的最高温度，单位 ℃ |
| 扩展 `0x186140F3 / 8` | 字节 4 − 40 为最高温度，`FF` 无效 | 更新 `dash.dtwd.val`；BMS 低压字段不覆盖 SDC ADC |
MCU 内保存 0.1 V / 0.1 A 原始精度，仅显示层四舍五入。例 `0F A0 14 03 00 00 00 05` = 400.0 V / +12.3 A，显示 400 / 12；`10 73 10 D1 00 00 00 05` = 421.1 V / −69.5 A，显示 421 / −70。
最高温度只取前八个实际通道，不能把 BmsMonitor 补出的第 9/10 路纳入最大值。`42 FF 43 47 37 0A 50 41` 的最大温度为 40 ℃。全为 `FF` 时立即失效。
BmsMonitor 没有电机或逆变器温度协议；`dash.djwd` / `dash.mcuwd` 保持无效。扭矩和车速也缺少可直接使用的单位映射，保持无效。
## 有效性与刷新
白色数值表示收到有效数据；深灰色表示未知或失效，保留的历史值仅作参考。初始灰色 0 不能作为测量结果。
刚重新打开或连接屏幕时，需等待首轮同步（最长约 5.6 秒）；屏幕自身的初始 0 不表示有效测量。
- SDC ADC 独立超时 1500 ms。
- BMS 电压/电流独立超时 2000 ms。
- BMS 最高温度独立超时 2000 ms；全通道无效时立即失效。
- 其他源的流量不会延长上述计时；有效报文恢复后自动转白。
- 只对数值或有效性变化排队，字段轮转和 UART DMA 发送最新值，避免高频字段阻塞其他字段。
- 每 5 秒额外重新同步整套数值、有效颜色和 debug 状态，支持屏幕晚于 MCU 启动或编辑器重新连接；一轮刷新还需约 0.6 秒串口发送时间。
- 校验标准/扩展格式、Classic CAN、数据帧及 DLC；未知或长度不匹配的报文不更新数据。
USART2 为 9600、8N1，PA2 TX / PA3 RX。命令为 ASCII，末尾三个真实 `FF FF FF` 字节。`dash.lvbat.val=1230` 显示 12.30 V，`lvbat` 全局作用域，`vvs1=2`；参见 [淘晶驰虚拟浮点数文档](http://wiki.tjc1688.com/widgets/Xfloat.html)。其余 UART 数字接口沿用 [通讯交接文档](通讯交接文档.md)。
## 任务回传
屏幕确认后发送 `AA 55 01 NN 0D 0A`，`NN=01..06`；取消不发送。MCU 用 Receive-to-Idle DMA 按字节流解析拆包/粘包。
MCU 发出标准 `0x300 / 8`：版本 1、任务号、uint8 序号、来源 1、uint32 小端 MCU ms。任务依次为八字绕环、直线加速、高速循迹、车检测试、EBS 测试、手动驾驶。此接口是原有 AMI 请求，**不是 SDC DBC 定义的 ASSI 控制**；没有 VCU 映射前不把任务号直接写成 `0x6A5` 灯状态。
请求优先进入最近 500 ms 收到有效协议报文的 CAN 口；两路活跃则发两路，无接收历史则尝试两路。现有未连接 CAN 口自动重发可能填满 TX FIFO，并阻塞后续软件任务；本次保留原任务队列策略。回归覆盖 CAN1 持续有有效输入的情况。
PA0 LED 每 500 ms 翻转，PA1 为仪表/SDC 状态活动超时提示，默认高电平有效；尚未观察验证灯的物理极性和行为，活动灯不能替代每个数值的有效性判断。
## 验证范围
已完成 Release 编译、SWD 烧录校验、HMI 编译（0 错误 / 0 警告），以及 **CAN 盒 → 实物 AMI CAN1 → MCU USART2 → COM4 → 官方 HMI 调试器** 数据更新测试。
同时发送 SDC 20 ms 频率、100 ms 心跳、500 ms ADC 和 BMS 报文，验证标准/扩展 BMS、负电流、无效温度、独立超时、恢复、错误 DLC 和旧 ID 拒绝。原始帧、截图和 SWD 快照见 [发布的发送记录](evidence/2026-10-03/sdc-bms/sdc_bms_visual_results.json)。
CAN2 配置及过滤寄存器与 CAN1 相同，但本次未接线实测 CAN2。未测试物理串口屏，未接真实 SDC/BMS 节点，未验证 VCU 实际执行或安全动作。现有画面的 EBS 文案不能作为安全状态证明。
docs/SDC_BMS联调报告.md
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# AMI SDC / BMS 联调报告
2026-10-03，测试链路：PCAN-USB（500 kbit/s）→ 实物 AMI CAN1 → STM32G0B1 MCU → USART2 PA2/PA3 → CH340 COM4（9600 8N1）→ USART HMI 官方调试器。使用 CAN 盒模拟 SDC / BMS 报文，未接真实 SDC / BMS 节点或物理串口屏。
## 实际发送与显示
| ID / 格式 / DLC | CAN 数据（十六进制） | 含义 | HMI 实测 |
| --- | --- | --- | --- |
| `0x6A1` 标准 / 2 | `08 20` | ADC 8200 mV | 低压电池 8.20 V |
| `0x6A1` 标准 / 2 | `0C 30` | ADC 12300 mV | 低压电池 12.30 V |
| `0x140` 标准 / 8 | `0F A0 14 03 00 00 00 05` | 400.0 V，+12.3 A | 高压 400，电流 12 |
| `0x156` 标准 / 8 | `42 FF 43 47 37 0A 50 41` | 八路实际温度，第二路无效，最高 40 ℃ | 最高单体 40 |
| `0x186040F3` 扩展 / 8 | `10 73 10 D1 00 00 00 05` | 421.1 V，−69.5 A | 高压 421，电流 −70 |
| `0x186140F3` 扩展 / 8 | `10 04 0C E4 3F 17 00 7B` | 最高温度 23 ℃ | 最高单体 23 |
| `0x156` 标准 / 8 | `FF FF FF FF FF FF FF FF` | 无有效温度 | 原温度保留但变灰，MCU 有效位清零 |
低压控件 `lvbat` 为两位小数虚拟浮点数；高压、电流沿用整数控件，四舍五入显示。MCU 内保留高压/电流的 0.1 单位精度。电机/逆变器温度没有来源协议，保持灰色无效值，没有将电池温度套用到电机。
同一测试同时发送：SDC 心跳 100 ms、ADC 500 ms、四路频率 20 ms、BMS 状态 100 ms、BMS 温度 200 ms。轮频 `32 00 64 00 96 00 C8 00` 为 50 / 100 / 150 / 200 Hz，未擅自当作 km/h。
## 通过的检查
- MCU 不重启，仅重新打开并连接 HMI，等待同步后无效值恢复灰色；每 5 秒重新同步整套显示状态。\n- 实际 HMI 数值更新，标准与扩展 BMS 均可用，负电流符号和偏置正确。
- `FF` 无效温度被排除；全部温度无效时立即失效；恢复后重新转白。
- 只保留 SDC 心跳时，ADC 1500 ms、BMS 电压/电流 2000 ms 独立超时，变灰；心跳没有为其他数值续期。
- 恢复阶段显示 12.68 V / 55 V / 0 A / 27 ℃（BMS 原始总压 54.5 V）。
- 错误 DLC、同 ID 错误标准/扩展类型，以及旧 `0x180` 数据没有覆盖有效读数。
- 在 debug 页面更新数据，返回 dash 后显示 14.50 V / 300 V / −5 A / 60 ℃；具名 debug 状态保持未知。
- 同时注入 BMS 扩展帧的低压字段 8.5 V，仪表低压仍为 SDC ADC 的 14.50 V，没有被 BMS 覆盖。
- 六个任务确认均收到正确标准 `0x300 / 8` 请求，六个取消均没有 CAN 请求。测试期间 CAN1 持续有有效 SDC / BMS 输入。
- SWD 五阶段快照中的显示值、原始 ADC / BMS 值、有效位与预期一致，UART / CAN 接收错误计数均为 0；PCAN 状态为 0。
任务 CAN 序号依次为 0..5，前三个固定字段与来源字段为 `01 NN SEQ 01`，后四字节为 MCU 小端毫秒时间。任务回传仍为原 AMI 请求，未发 SDC DAC 或 ASSI 控制。
## 文件与证据
- [当前协议](SDC_BMS协议.md)
- [HMI 工程](../AMI.HMI)，SHA256 `8A37E4961F90671F04E55BA94C173AE8FBFC5E30C2A3E74A2C37148157C3D16D`
- [固件 BIN](../output/firmware/AMI_Controller.bin)，SHA256 `F0DA6EC9C5C8A4F803E4CDD28BB73C6458E010B15F32D3EAEF5C3A1B60D8827B`
- [全部 CAN 发送记录](evidence/2026-10-03/sdc-bms/sdc_bms_visual_results.json)
- [MCU 快照自动核对](evidence/2026-10-03/sdc-bms/sdc_bms_verified.json)
- [任务回归](evidence/2026-10-03/sdc-bms/sdc_bms_function_task_results.json)
- [跨页面记录](evidence/2026-10-03/sdc-bms/sdc_bms_cross_page.json)
- [烧录日志](evidence/2026-10-03/sdc-bms/sdc_bms_flash.log)
Release：Flash 15612 B，RAM 2632 B，编译通过；SWD 烧录显示 `Download verified successfully`。HMI 编辑器编译显示 0 错误、0 警告，[编译截图](evidence/2026-10-03/sdc-bms/saved_editor.png)。原 HMI 保留在 `tmp/can1-test-20261002/AMI_before_sdc_bms.HMI`，新版本另留验证副本。
![标准帧显示](evidence/2026-10-03/sdc-bms/sdc_bms_standard.png)
![扩展帧显示](evidence/2026-10-03/sdc-bms/sdc_bms_extended.png)
## 尚缺资料或未测试部分
电机/逆变器温度的 CAN ID、字段和缩放，SDC GPIO 到具名安全信号的映射及正常极性，轮频到 km/h 的标定参数均缺失。CAN2 配置与 CAN1 相同，SWD 过滤寄存器均为 `0x0103002B`，但没有接线实测 CAN2。未测试物理串口屏、灯极性、VCU 执行反馈和车辆安全动作。现有未活跃端口的任务重发/队列限制未修改，详情见当前协议文档。
docs/evidence/2026-10-03/dbc-validation.json
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{
"result": "passed",
"messages": 10,
"signals": 33,
"known_payload_checks": 24,
"all_task_ids_and_counter_edges": true,
"firmware_ids_match": true,
"sdc_source_layout_match": true,
"cantools_version": "44.1.0"
}
docs/evidence/2026-10-03/sdc-bms/saved_editor.png
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docs/evidence/2026-10-03/sdc-bms/sdc_bms_all_temp_invalid_ram.log
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-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------
ST-LINK SN : 37FF71064E573436188C1543
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.28V
SWD freq : 950 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x467
Revision ID : Rev Z
Device name : STM32G0B0xx/B1xx/C1xx
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0x92
Reading 32-bit memory content
Size : 128 Bytes
Address: : 0x200002C8
0x200002C8 : 00000000 00000000 00000000 00002603
0x200002D8 : 00000000 FFFFFD49 00011073 00000064
0x200002E8 : 55AA7FFF 00640032 00C80096 0000300C
0x200002F8 : 0000254A 000025B7 00002418 000025B7
0x20000308 : 000025B7 00000000 00000000 000001A5
0x20000318 : 00000000 FFFFFFBA 00000000 00000000
0x20000328 : 00000017 000004CE 0000008A 00000000
0x20000338 : 00000000 00000000 00000000 2637AB02
docs/evidence/2026-10-03/sdc-bms/sdc_bms_cross_page.json
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{
"debug_screenshot": "D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_debug_cross_page.png",
"dash_screenshot": "D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_dash_cross_page.png",
"tx": [
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
},
{
"id": "0x6a0",
"extended": false,
"data": "A1 01 00 00 00 00 00 00"
},
{
"id": "0x6a1",
"extended": false,
"data": "A4 38"
},
{
"id": "0x140",
"extended": false,
"data": "0B B8 13 56 00 00 00 05"
},
{
"id": "0x156",
"extended": false,
"data": "28 FF 32 3C 46 50 5A 64"
},
{
"id": "0x186140f3",
"extended": true,
"data": "10 04 0C E4 64 17 00 55"
}
],
"pcan_status": "0x0"
}
docs/evidence/2026-10-03/sdc-bms/sdc_bms_dash_cross_page.png
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-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------
ST-LINK SN : 37FF71064E573436188C1543
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.28V
SWD freq : 950 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x467
Revision ID : Rev Z
Device name : STM32G0B0xx/B1xx/C1xx
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0x92
Reading 32-bit memory content
Size : 128 Bytes
Address: : 0x200002C8
0x200002C8 : 00000000 00000000 00000000 00001951
0x200002D8 : 00000000 FFFFFD49 00011073 00000064
0x200002E8 : 55AA7FFF 00640032 00C80096 0000300C
0x200002F8 : 00001897 00001901 00001765 00001900
0x20000308 : 00001901 00000000 00000000 000001A5
0x20000318 : 00000000 FFFFFFBA 00000000 00000000
0x20000328 : 00000017 000004CE 000000CA 00000000
0x20000338 : 00000000 00000000 00000000 2637AB02
docs/evidence/2026-10-03/sdc-bms/sdc_bms_filters.log
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-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------
ST-LINK SN : 37FF71064E573436188C1543
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.28V
SWD freq : 950 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x467
Revision ID : Rev Z
Device name : STM32G0B0xx/B1xx/C1xx
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0x92
Reading 32-bit memory content
Size : 4 Bytes
Address: : 0x40006480
0x40006480 : 0103002B
Reading 32-bit memory content
Size : 4 Bytes
Address: : 0x40006880
0x40006880 : 0103002B
docs/evidence/2026-10-03/sdc-bms/sdc_bms_flash.log
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-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------
ST-LINK SN : 37FF71064E573436188C1543
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.28V
SWD freq : 950 KHz
Connect mode: Under Reset
Reset mode : Hardware reset
Device ID : 0x467
Revision ID : Rev Z
Device name : STM32G0B0xx/B1xx/C1xx
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0x92
Opening and parsing file: AMI_Controller.bin
Memory Programming ...
File : AMI_Controller.bin
Size : 15.25 KB
Address : 0x08000000
Erasing memory corresponding to segment 0:
Erasing internal memory sectors [0 7]
Download in Progress:
�������������������������������������������������� 0%
�������������������������������������������������� 100%
File download complete
Time elapsed during download operation: 00:00:00.756
Verifying...
Read progress:
�������������������������������������������������� 50%
�������������������������������������������������� 100%
Time elapsed during verifying operation: 00:00:00.250
Download verified successfully
MCU Reset
Software reset is performed
Core run
docs/evidence/2026-10-03/sdc-bms/sdc_bms_function_task1_cancel_page.png
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{
"results": [
{
"task": 1,
"cancel_no_can_request": true,
"confirm_can_request_correct": true,
"cancel_frames": [],
"confirm_frames": [
{
"time_s": 4.266792699927464,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 01 00 01 54 0f 00 00"
}
],
"screenshots": [
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task1_cancel_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task1_cancel_return.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task1_confirm_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task1_confirm_return.png"
]
},
{
"task": 2,
"cancel_no_can_request": true,
"confirm_can_request_correct": true,
"cancel_frames": [],
"confirm_frames": [
{
"time_s": 8.49011349992361,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 02 01 01 d2 1f 00 00"
}
],
"screenshots": [
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task2_cancel_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task2_cancel_return.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task2_confirm_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task2_confirm_return.png"
]
},
{
"task": 3,
"cancel_no_can_request": true,
"confirm_can_request_correct": true,
"cancel_frames": [],
"confirm_frames": [
{
"time_s": 12.718478399910964,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 03 02 01 5f 30 00 00"
}
],
"screenshots": [
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task3_cancel_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task3_cancel_return.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task3_confirm_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task3_confirm_return.png"
]
},
{
"task": 4,
"cancel_no_can_request": true,
"confirm_can_request_correct": true,
"cancel_frames": [],
"confirm_frames": [
{
"time_s": 16.947464799974114,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 04 03 01 dd 40 00 00"
}
],
"screenshots": [
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task4_cancel_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task4_cancel_return.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task4_confirm_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task4_confirm_return.png"
]
},
{
"task": 5,
"cancel_no_can_request": true,
"confirm_can_request_correct": true,
"cancel_frames": [],
"confirm_frames": [
{
"time_s": 21.19982430001255,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 05 04 01 79 51 00 00"
}
],
"screenshots": [
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task5_cancel_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task5_cancel_return.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task5_confirm_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task5_confirm_return.png"
]
},
{
"task": 6,
"cancel_no_can_request": true,
"confirm_can_request_correct": true,
"cancel_frames": [],
"confirm_frames": [
{
"time_s": 25.43611010001041,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 06 05 01 02 62 00 00"
}
],
"screenshots": [
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task6_cancel_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task6_cancel_return.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task6_confirm_page.png",
"D:\\YMR\\AMI\\tmp\\can1-test-20261002\\sdc_bms_function_task6_confirm_return.png"
]
}
],
"rx": [
{
"time_s": 4.266792699927464,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 01 00 01 54 0f 00 00"
},
{
"time_s": 8.49011349992361,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 02 01 01 d2 1f 00 00"
},
{
"time_s": 12.718478399910964,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 03 02 01 5f 30 00 00"
},
{
"time_s": 16.947464799974114,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 04 03 01 dd 40 00 00"
},
{
"time_s": 21.19982430001255,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 05 04 01 79 51 00 00"
},
{
"time_s": 25.43611010001041,
"id": 768,
"dlc": 8,
"extended": false,
"data": "01 06 05 01 02 62 00 00"
}
],
"pcan_status": "0x0"
}
docs/evidence/2026-10-03/sdc-bms/sdc_bms_hmi_reconnect.png
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docs/evidence/2026-10-03/sdc-bms/sdc_bms_recovered_ram.log
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-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------
ST-LINK SN : 37FF71064E573436188C1543
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.28V
SWD freq : 950 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x467
Revision ID : Rev Z
Device name : STM32G0B0xx/B1xx/C1xx
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0x92
Reading 32-bit memory content
Size : 128 Bytes
Address: : 0x200002C8
0x200002C8 : 00000000 00000000 00000000 00003F7E
0x200002D8 : 00000000 00000000 00010221 00000064
0x200002E8 : 55AA7FFF 00640032 00C80096 00003188
0x200002F8 : 00003EC5 00003F33 00003D92 00003F32
0x20000308 : 00003F33 00000000 00000000 00000037
0x20000318 : 00000000 00000000 00000000 00000000
0x20000328 : 0000001B 000004F4 000000CA 00000000
0x20000338 : 00000000 00000000 00000000 2637AB02
docs/evidence/2026-10-03/sdc-bms/sdc_bms_source_timeout.png
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-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------
ST-LINK SN : 37FF71064E573436188C1543
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.28V
SWD freq : 950 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x467
Revision ID : Rev Z
Device name : STM32G0B0xx/B1xx/C1xx
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0x92
Reading 32-bit memory content
Size : 128 Bytes
Address: : 0x200002C8
0x200002C8 : 00000000 00000000 00000000 0000326B
0x200002D8 : 00000000 FFFFFD49 00011073 00000064
0x200002E8 : 55AA7FFF 00640032 00C80096 0000300C
0x200002F8 : 0000254A 000025B7 00002418 0000326B
0x20000308 : 000025B7 00000000 00000000 000001A5
0x20000318 : 00000000 FFFFFFBA 00000000 00000000
0x20000328 : 00000017 000004CE 00000000 00000000
0x20000338 : 00000000 00000000 00000000 2637AB02
docs/evidence/2026-10-03/sdc-bms/sdc_bms_standard.png
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-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------
ST-LINK SN : 37FF71064E573436188C1543
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.28V
SWD freq : 950 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x467
Revision ID : Rev Z
Device name : STM32G0B0xx/B1xx/C1xx
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0x92
Reading 32-bit memory content
Size : 128 Bytes
Address: : 0x200002C8
0x200002C8 : 00000000 00000000 00000000 00000BEC
0x200002D8 : 00000000 0000007B 00010FA0 00000064
0x200002E8 : 55AA7FFF 00640032 00C80096 00002008
0x200002F8 : 00000B3A 00000BA7 00000A01 00000BA7
0x20000308 : 00000BA7 00000000 00000000 00000190
0x20000318 : 00000000 0000000C 00000000 00000000
0x20000328 : 00000028 00000334 000000CA 00000000
0x20000338 : 00000000 00000000 00000000 2637AB02
docs/evidence/2026-10-03/sdc-bms/sdc_bms_verified.json
+100
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{
"real_mcu_snapshot_checks": [
{
"stage": "standard",
"values": [
0,
400,
0,
12,
0,
0,
40,
820
],
"valid_mask": "0xca",
"adc_mv": 8200,
"hv_tenths": 4000,
"current_tenths": 123,
"pass": true
},
{
"stage": "extended",
"values": [
0,
421,
0,
-70,
0,
0,
23,
1230
],
"valid_mask": "0xca",
"adc_mv": 12300,
"hv_tenths": 4211,
"current_tenths": -695,
"pass": true
},
{
"stage": "all_temp_invalid",
"values": [
0,
421,
0,
-70,
0,
0,
23,
1230
],
"valid_mask": "0x8a",
"adc_mv": 12300,
"hv_tenths": 4211,
"current_tenths": -695,
"pass": true
},
{
"stage": "source_timeout",
"values": [
0,
421,
0,
-70,
0,
0,
23,
1230
],
"valid_mask": "0x0",
"adc_mv": 12300,
"hv_tenths": 4211,
"current_tenths": -695,
"pass": true
},
{
"stage": "recovered",
"values": [
0,
55,
0,
0,
0,
0,
27,
1268
],
"valid_mask": "0xca",
"adc_mv": 12680,
"hv_tenths": 545,
"current_tenths": 0,
"pass": true
}
],
"task_confirm_pass": 6,
"task_cancel_pass": 6,
"pcan_status": "0x0",
"firmware_sha256": "f0da6ec9c5c8a4f803e4cdd28bb73c6458e010b15f32d3eaef5c3a1b60d8827b",
"hmi_sha256": "8a37e4961f90671f04e55ba94c173ae8fbfc5e30c2a3e74a2c37148157c3d16d",
"visual_review": "Screenshots inspected separately: standard, extended, invalid, timeout, recovery and cross-page."
}
docs/evidence/2026-10-03/sdc-bms/sdc_bms_visual_results.json
+6729
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docs/通讯交接文档.md
+12 -10
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@@ -1,9 +1,11 @@
# AMI 仪表通讯交接文档 # AMI 仪表通讯交接文档
协议版本 1.2（新增低压电池电压） | 2026-10-01 屏幕接口 1.2；MCU CAN 协议 2.0（SDC / BMS） | 2026-10-03
适用工程：AMI.HMI；屏幕 TJC4827X543_011，480 × 272；编辑器 USART HMI 1.68.1.3037。本文以随附的精简指令版工程为准。 适用工程：AMI.HMI；屏幕 TJC4827X543_011，480 × 272；编辑器 USART HMI 1.68.1.3037。本文以随附的精简指令版工程为准。
2026-10-03 补充：dash 增加全局虚拟浮点控件 `lvbat`，两位小数，`dash.lvbat.val=1230` 显示 12.30 V，来源为 SDC ADC。当前 MCU CAN 输入见 [SDC_BMS协议.md](SDC_BMS协议.md)；原整数高压电压/电流控件四舍五入为 1 V / 1 A。灰色数值表示未知或失效。SDC GPIO 尚无具名安全状态映射，当前 MCU 不生成正常/故障判断。
## 1. 接手先看这三点 ## 1. 接手先看这三点
主控 → 屏幕：发送文本指令，末尾必须追加三个实际字节 FF FF FF。屏幕 → 主控：用户确认任务后发送固定 6 字节帧 AA 55 01 NN 0D 0A。这两种帧的结束方式不同。 主控 → 屏幕：发送文本指令，末尾必须追加三个实际字节 FF FF FF。屏幕 → 主控：用户确认任务后发送固定 6 字节帧 AA 55 01 NN 0D 0A。这两种帧的结束方式不同。
@@ -117,16 +119,16 @@ Program.s 上电通过 printh 发出 00 00 00 FF FF FF 88 FF FF FF。该启动
| --- | --- | --- | | --- | --- | --- |
| 低压电池电压 | dash.lvbat.val=1260 | 0.01 V/计数；显示 12.60 V | | 低压电池电压 | dash.lvbat.val=1260 | 0.01 V/计数；显示 12.60 V |
| 当前车速 | dash.speed.val=30 | 界面标注 km/h；示例显示 30 | | 当前车速 | dash.speed.val=30 | 界面标注 km/h；示例显示 30 |
| 高压电压 | dash.ts.val=300 | 示例为显示值；电气单位需与主控统一 | | 高压电压 | dash.ts.val=300 | 整数 V；BMS 原始 0.1 V 四舍五入 |
| 扭矩千分 | dash.mct.val=500 | 保留界面“扭矩千分”定义 | | 扭矩千分 | dash.mct.val=500 | 保留界面“扭矩千分”定义 |
| 高压电流 | dash.dl.val=20 | 示例为显示值 | | 高压电流 | dash.dl.val=20 | 整数 A；BMS 原始偏置 uint16 换算后四舍五入 |
| 电机温度 | dash.djwd.val=45 | 示例为显示值 | | 电机温度 | dash.djwd.val=45 | 控件支持整数 ℃；当前 MCU 无来源，保持无效 |
| MCU 温度 | dash.mcuwd.val=40 | 示例为显示值 | | MCU 温度 | dash.mcuwd.val=40 | 控件支持整数 ℃；当前 MCU 无来源，保持无效 |
| 最高单体 | dash.dtwd.val=50 | 含义/单位待主控确认，不能仅按控件名猜测 | | 最高单体 | dash.dtwd.val=50 | BMS 最高有效实际温度，整数 ℃ |
低压电池电压放在车速上方，保留两位小数。主控若采集为 mV，应先换算为 0.01 V 整数（例如 12600 mV → 1260）。指令 dash.lvbat.val=1260 后仍追加 FF FF FF。该值为全局，切页保留，上电设计初值 0.00 V；初值和断线后的旧值不代表有效测量，也没有自动低压告警。 低压电池电压放在车速上方，保留两位小数。主控若采集为 mV，应先换算为 0.01 V 整数（例如 12600 mV → 1260）。指令 dash.lvbat.val=1260 后仍追加 FF FF FF。该值为全局，切页保留，上电设计初值 0.00 V；初值和断线后的旧值不代表有效测量，也没有自动低压告警。
数值 val 按有符号 32 位整数使用。除新增低压电池电压外，高压电压、电流、温度及“最高单体”的单位、有效范围、无效值和缩放未形成主控协议，接手者应与主控统一。 数值 val 按有符号 32 位整数使用。当前 CAN 来源、单位、缩放、独立超时和有效颜色已在 [AMI_CAN_DBC说明.md](AMI_CAN_DBC说明.md) 定义。车速、扭矩、电机/逆变器温度尚缺来源或标定，不能把示例值当作测量结果。
## 页面指令 ## 页面指令
@@ -183,13 +185,13 @@ int ami_set_debug(unsigned id, unsigned state)
## 已完成与待验证 ## 已完成与待验证
已完成：USART HMI 编译 0 错误、0 警告；模拟器验证跨页数值更新、正常/故障/未知转换，以及 d1 双位置同步；新增 lvbat 已验证 1260 显示 12.60 V、跨页更新 1185 显示 11.85 V。六个任务回传此前已做模拟检查。待完成：实际屏幕下载、UART 收发、触摸行为、数据时序和车辆安全动作。C 示例仅为驱动接入参考，本次未在目标主控工程中编译。 已完成：USART HMI 编译 0 错误、0 警告；模拟器验证跨页数值更新、正常/故障/未知转换，以及 d1 双位置同步；新增 lvbat 已验证 1260 显示 12.60 V、跨页更新 1185 显示 11.85 V。六个任务回传此前已做模拟检查。2026-10-03 已通过实物 CAN1 / MCU / USART2 / COM4 到官方 HMI 调试器联调，含六个任务确认/取消、失效和恢复。待完成：物理屏幕下载、实物触摸与完整时延、CAN2 接线和车辆安全动作。C 示例仅为驱动接入参考，本次未在目标主控工程中编译。
## 8. 工程版本与资料 ## 8. 工程版本与资料
配套 AMI.HMI 的 SHA-256： 配套 AMI.HMI 的 SHA-256：
c667e115e3a7c8c1fd08e9c135d101c4d5bb1d3fe4b3f46ca80a85e860a06d1f 8a37e4961f90671f04e55ba94c173ae8fbfc5e30c2a3e74a2c37148157c3d16d
旧版工程不能与本版 dN 接口混用。配套文件包括 AMI.HMI、PDF、通讯交接文档.md 和 ami_debug_send.c；其中 Markdown 为可编辑文字源，C 文件为参考发送函数。仓库中的实际位置见 README。 旧版工程不能与本版 dN 接口混用。配套文件包括 AMI.HMI、AMI.dbc、DBC 说明、通讯交接文档.md 和 ami_debug_send.c；旧 PDF 保留为 v1.2 历史资料，其中 Markdown 为可编辑文字源，C 文件为参考发送函数。仓库中的实际位置见 README。
官方协议依据：wiki.tjc1688.com/commands/index.html；wiki.tjc1688.com/return/index.html；wiki.tjc1688.com/variables/bkcmd.html。项目自定义任务帧和 dN 编号以本文及配套工程为准。 官方协议依据：wiki.tjc1688.com/commands/index.html；wiki.tjc1688.com/return/index.html；wiki.tjc1688.com/variables/bkcmd.html。项目自定义任务帧和 dN 编号以本文及配套工程为准。
docs/验证说明.txt
+9 -4
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@@ -1,4 +1,9 @@
协议v1.2：新增dash.lvbat.val，0.01V/计数，显示两位小数；d0-d15保持不变，tm0=250ms。 2026-10-03：屏幕数字接口1.2，MCU CAN输入2.0（SDC/BMS）。
编译0错误0警告；模拟器验证1260显示12.60V、跨页1185显示11.85V；此前通过debug三态显示及d1双位置同步。 AMI.dbc包含10条Classic CAN报文和33个信号，CAN1/CAN2为500 kbit/s。
真实屏幕及主控串口未联机验证。 cantools 44.1.0严格解析、24个已知报文、六个任务号及计数边界、标准/扩展ID、偏置电流、无效温度和SDC布局一致性检查通过；具体复现命令见docs/AMI_CAN_DBC说明.md。
主控C示例尚未在目标工程编译。 HMI编译0错误0警告；固件Release编译、SWD烧录校验通过。
已实测CAN盒->实物AMI CAN1/MCU->USART2->COM4->官方HMI调试器：低压电压、高压电压/电流、最高有效温度、无效数据、超时/恢复、跨页更新、HMI重连。
六个任务确认均收到正确0x300请求，六个取消均未发送；该测试条件为CAN1持续有有效输入。
证据在docs/evidence/2026-10-03/sdc-bms；联调报告见docs/SDC_BMS联调报告.md。
未接物理串口屏或真实SDC/BMS节点，未实测CAN2、LED极性和车辆执行/安全动作；未定义电机温度、轮频到车速标定和GPIO到具名安全信号映射。
原C示例是屏幕debug接口参考，不代表整车控制已实现。
firmware/AMI_Controller.ioc
+220
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@@ -0,0 +1,220 @@
#MicroXplorer Configuration settings - do not modify
CAD.formats=[]
CAD.pinconfig=Dual
CAD.provider=
Dma.Request0=USART2_TX
Dma.Request1=USART2_RX
Dma.RequestsNb=2
Dma.USART2_RX.1.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART2_RX.1.EventEnable=DISABLE
Dma.USART2_RX.1.Instance=DMA1_Channel2
Dma.USART2_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_RX.1.MemInc=DMA_MINC_ENABLE
Dma.USART2_RX.1.Mode=DMA_NORMAL
Dma.USART2_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_RX.1.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_RX.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART2_RX.1.Priority=DMA_PRIORITY_HIGH
Dma.USART2_RX.1.RequestNumber=1
Dma.USART2_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART2_RX.1.SignalID=NONE
Dma.USART2_RX.1.SyncEnable=DISABLE
Dma.USART2_RX.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART2_RX.1.SyncRequestNumber=1
Dma.USART2_RX.1.SyncSignalID=NONE
Dma.USART2_TX.0.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART2_TX.0.EventEnable=DISABLE
Dma.USART2_TX.0.Instance=DMA1_Channel1
Dma.USART2_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_TX.0.MemInc=DMA_MINC_ENABLE
Dma.USART2_TX.0.Mode=DMA_NORMAL
Dma.USART2_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_TX.0.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_TX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART2_TX.0.Priority=DMA_PRIORITY_HIGH
Dma.USART2_TX.0.RequestNumber=1
Dma.USART2_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART2_TX.0.SignalID=NONE
Dma.USART2_TX.0.SyncEnable=DISABLE
Dma.USART2_TX.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART2_TX.0.SyncRequestNumber=1
Dma.USART2_TX.0.SyncSignalID=NONE
FDCAN1.AutoRetransmission=ENABLE
FDCAN1.CalculateBaudRateNominal=500000
FDCAN1.CalculateTimeBitNominal=2000
FDCAN1.CalculateTimeQuantumNominal=125.0
FDCAN1.DataPrescaler=8
FDCAN1.DataTimeSeg1=13
FDCAN1.DataTimeSeg2=2
FDCAN1.IPParameters=AutoRetransmission,CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,DataPrescaler,DataTimeSeg1,DataTimeSeg2,StdFiltersNbr,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2,ExtFiltersNbr
FDCAN1.NominalPrescaler=8
FDCAN1.NominalTimeSeg1=13
FDCAN1.NominalTimeSeg2=2
FDCAN1.StdFiltersNbr=3
FDCAN1.ExtFiltersNbr=1
FDCAN2.AutoRetransmission=ENABLE
FDCAN2.CalculateBaudRateNominal=500000
FDCAN2.CalculateTimeBitNominal=2000
FDCAN2.CalculateTimeQuantumNominal=125.0
FDCAN2.DataPrescaler=8
FDCAN2.DataTimeSeg1=13
FDCAN2.DataTimeSeg2=2
FDCAN2.IPParameters=AutoRetransmission,CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,DataPrescaler,DataTimeSeg1,DataTimeSeg2,StdFiltersNbr,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2,ExtFiltersNbr
FDCAN2.NominalPrescaler=8
FDCAN2.NominalTimeSeg1=13
FDCAN2.NominalTimeSeg2=2
FDCAN2.StdFiltersNbr=3
FDCAN2.ExtFiltersNbr=1
File.Version=6
GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
Mcu.CPN=STM32G0B1CBT6
Mcu.Family=STM32G0
Mcu.IP0=DMA
Mcu.IP1=FDCAN1
Mcu.IP2=FDCAN2
Mcu.IP3=NVIC
Mcu.IP4=RCC
Mcu.IP5=SYS
Mcu.IP6=USART2
Mcu.IPNb=7
Mcu.Name=STM32G0B1C(B-C-E)Tx
Mcu.Package=LQFP48
Mcu.Pin0=PA0
Mcu.Pin1=PA1
Mcu.Pin10=VP_SYS_VS_Systick
Mcu.Pin11=VP_SYS_VS_DBSignals
Mcu.Pin2=PA2
Mcu.Pin3=PA3
Mcu.Pin4=PB0
Mcu.Pin5=PB1
Mcu.Pin6=PA11 [PA9]
Mcu.Pin7=PA12 [PA10]
Mcu.Pin8=PA13
Mcu.Pin9=PA14-BOOT0
Mcu.PinsNb=12
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32G0B1CBTx
MxCube.Version=6.15.0
MxDb.Version=DB.6.0.150
NVIC.DMA1_Channel1_IRQn=true\:1\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA1_Channel2_3_IRQn=true\:1\:0\:false\:false\:true\:false\:true\:true
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PendSV_IRQn=true\:3\:0\:false\:false\:true\:false\:false\:false
NVIC.SVC_IRQn=true\:3\:0\:false\:false\:true\:false\:false\:true
NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true\:false
NVIC.TIM16_FDCAN_IT0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.TIM17_FDCAN_IT1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.USART2_LPUART2_IRQn=true\:1\:0\:false\:false\:true\:true\:true\:true
PA0.GPIOParameters=GPIO_Label
PA0.GPIO_Label=STATUS_LED1
PA0.Locked=true
PA0.Signal=GPIO_Output
PA1.GPIOParameters=GPIO_Label
PA1.GPIO_Label=STATUS_LED2
PA1.Locked=true
PA1.Signal=GPIO_Output
PA11\ [PA9].Mode=FDCAN_Activate
PA11\ [PA9].Signal=FDCAN1_RX
PA12\ [PA10].Mode=FDCAN_Activate
PA12\ [PA10].Signal=FDCAN1_TX
PA13.Mode=Serial_Wire
PA13.Signal=SYS_SWDIO
PA14-BOOT0.Mode=Serial_Wire
PA14-BOOT0.Signal=SYS_SWCLK
PA2.Mode=Asynchronous
PA2.Signal=USART2_TX
PA3.Mode=Asynchronous
PA3.Signal=USART2_RX
PB0.Mode=FDCAN_Activate
PB0.Signal=FDCAN2_RX
PB1.Mode=FDCAN_Activate
PB1.Signal=FDCAN2_TX
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerLinker=GCC
ProjectManager.CompilerOptimize=2
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=true
ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32G0B1CBTx
ProjectManager.FirmwarePackage=STM32Cube FW_G0 V1.6.2
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=false
ProjectManager.LibraryCopy=0
ProjectManager.MainLocation=Core/Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=AMI_Controller.ioc
ProjectManager.ProjectName=AMI_Controller
ProjectManager.ProjectStructure=
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x500
ProjectManager.TargetToolchain=CMake
ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_FDCAN1_Init-FDCAN1-false-HAL-true,5-MX_FDCAN2_Init-FDCAN2-false-HAL-true,6-MX_USART2_UART_Init-USART2-false-HAL-true
RCC.ADCFreq_Value=64000000
RCC.AHBFreq_Value=64000000
RCC.APBFreq_Value=64000000
RCC.APBTimFreq_Value=64000000
RCC.CECFreq_Value=32786.88524590164
RCC.CortexFreq_Value=64000000
RCC.EXTERNAL_CLOCK_VALUE=48000
RCC.FCLKCortexFreq_Value=64000000
RCC.FDCANFreq_Value=64000000
RCC.FamilyName=M
RCC.HCLKFreq_Value=64000000
RCC.HSE_VALUE=8000000
RCC.HSI48_VALUE=48000000
RCC.HSI_VALUE=16000000
RCC.I2C1Freq_Value=64000000
RCC.I2C2Freq_Value=64000000
RCC.I2S1Freq_Value=64000000
RCC.I2S2Freq_Value=64000000
RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APBFreq_Value,APBTimFreq_Value,CECFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2S1Freq_Value,I2S2Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LPUART2Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLR,PLLRCLKFreq_Value,PWRFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIM15Freq_Value,TIM1Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
RCC.LPTIM1Freq_Value=64000000
RCC.LPTIM2Freq_Value=64000000
RCC.LPUART1Freq_Value=64000000
RCC.LPUART2Freq_Value=64000000
RCC.LSCOPinFreq_Value=32000
RCC.LSE_VALUE=32768
RCC.LSI_VALUE=32000
RCC.MCO1PinFreq_Value=64000000
RCC.MCO2PinFreq_Value=64000000
RCC.PLLN=16
RCC.PLLPoutputFreq_Value=128000000
RCC.PLLQoutputFreq_Value=128000000
RCC.PLLR=RCC_PLLR_DIV4
RCC.PLLRCLKFreq_Value=64000000
RCC.PWRFreq_Value=64000000
RCC.SYSCLKFreq_VALUE=64000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.TIM15Freq_Value=64000000
RCC.TIM1Freq_Value=64000000
RCC.USART1Freq_Value=64000000
RCC.USART2Freq_Value=64000000
RCC.USART3Freq_Value=64000000
RCC.USBFreq_Value=48000000
RCC.VCOInputFreq_Value=16000000
RCC.VCOOutputFreq_Value=256000000
USART2.BaudRate=9600
USART2.IPParameters=VirtualMode-Asynchronous,BaudRate
USART2.VirtualMode-Asynchronous=VM_ASYNC
VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom
firmware/CMakeLists.txt
+68
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@@ -0,0 +1,68 @@
cmake_minimum_required(VERSION 3.22)
#
# This file is generated only once,
# and is not re-generated if converter is called multiple times.
#
# User is free to modify the file as much as necessary
#
# Setup compiler settings
set(CMAKE_C_STANDARD 11)
set(CMAKE_C_STANDARD_REQUIRED ON)
set(CMAKE_C_EXTENSIONS ON)
# Define the build type
if(NOT CMAKE_BUILD_TYPE)
set(CMAKE_BUILD_TYPE "Debug")
endif()
# Set the project name
set(CMAKE_PROJECT_NAME AMI_Controller)
# Enable compile command to ease indexing with e.g. clangd
set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
# Core project settings
project(${CMAKE_PROJECT_NAME})
message("Build type: " ${CMAKE_BUILD_TYPE})
# Enable CMake support for ASM and C languages
enable_language(C ASM)
# Create an executable object type
add_executable(${CMAKE_PROJECT_NAME})
# Add STM32CubeMX generated sources
add_subdirectory(cmake/stm32cubemx)
# Link directories setup
target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE
# Add user defined library search paths
)
# Add sources to executable
target_sources(${CMAKE_PROJECT_NAME} PRIVATE
Core/Src/ami_app.c
)
# Add include paths
target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE
Core/Inc
)
# Add project symbols (macros)
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE
# Add user defined symbols
)
# Remove wrong libob.a library dependency when using cpp files
list(REMOVE_ITEM CMAKE_C_IMPLICIT_LINK_LIBRARIES ob)
# Add linked libraries
target_link_libraries(${CMAKE_PROJECT_NAME}
stm32cubemx
# Add user defined libraries
)
firmware/CMakePresets.json
+38
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@@ -0,0 +1,38 @@
{
"version": 3,
"configurePresets": [
{
"name": "default",
"hidden": true,
"generator": "Ninja",
"binaryDir": "${sourceDir}/build/${presetName}",
"toolchainFile": "${sourceDir}/cmake/gcc-arm-none-eabi.cmake",
"cacheVariables": {
}
},
{
"name": "Debug",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Debug"
}
},
{
"name": "Release",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Release"
}
}
],
"buildPresets": [
{
"name": "Debug",
"configurePreset": "Debug"
},
{
"name": "Release",
"configurePreset": "Release"
}
]
}
firmware/Core/Inc/ami_app.h
+20
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@@ -0,0 +1,20 @@
#ifndef AMI_APP_H
#define AMI_APP_H
#include "main.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Change to GPIO_PIN_RESET here if both board LEDs are wired active-low. */
#define AMI_LED_ACTIVE_LEVEL GPIO_PIN_SET
void AMI_App_Init(void);
void AMI_App_Service(void);
#ifdef __cplusplus
}
#endif
#endif /* AMI_APP_H */
firmware/Core/Inc/ami_protocol.h
+23
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@@ -0,0 +1,23 @@
#ifndef AMI_PROTOCOL_H
#define AMI_PROTOCOL_H
/* Both CAN ports use the same 500 kbit/s protocol and the same IDs. */
#define AMI_CAN_ID_SDC_HEARTBEAT 0x6A0U
#define AMI_CAN_ID_SDC_ADC 0x6A1U
#define AMI_CAN_ID_SDC_FREQUENCY 0x6A2U
#define AMI_CAN_ID_SDC_DAC_ACK 0x6A4U
#define AMI_CAN_ID_SDC_GPIO 0x6A6U
#define AMI_CAN_ID_BMS_STATUS 0x140U
#define AMI_CAN_ID_BMS_TEMPERATURE 0x156U
#define AMI_CAN_ID_BMS_STATUS_EXT 0x186040F3UL
#define AMI_CAN_ID_BMS_EXTREMES_EXT 0x186140F3UL
/* AMI task requests are not ASSI commands; no SDC mapping is defined. */
#define AMI_CAN_ID_TASK_REQUEST 0x300U
#define AMI_CAN_DATA_TIMEOUT_MS 500U
#define AMI_ADC_TIMEOUT_MS 1500U
#define AMI_BMS_TIMEOUT_MS 2000U
#define AMI_SCREEN_BOOT_DELAY_MS 800U
#define AMI_SCREEN_RESYNC_MS 5000U
#endif /* AMI_PROTOCOL_H */
firmware/Core/Inc/dma.h
+51
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@@ -0,0 +1,51 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dma.h
* @brief This file contains all the function prototypes for
* the dma.c file
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __DMA_H__
#define __DMA_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* DMA memory to memory transfer handles -------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_DMA_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __DMA_H__ */
firmware/Core/Inc/fdcan.h
+54
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@@ -0,0 +1,54 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file fdcan.h
* @brief This file contains all the function prototypes for
* the fdcan.c file
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __FDCAN_H__
#define __FDCAN_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern FDCAN_HandleTypeDef hfdcan1;
extern FDCAN_HandleTypeDef hfdcan2;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_FDCAN1_Init(void);
void MX_FDCAN2_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __FDCAN_H__ */
firmware/Core/Inc/gpio.h
+48
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@@ -0,0 +1,48 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.h
* @brief This file contains all the function prototypes for
* the gpio.c file
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __GPIO_H__
#define __GPIO_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_GPIO_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /*__ GPIO_H__ */
firmware/Core/Inc/main.h
+73
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@@ -0,0 +1,73 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32g0xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define STATUS_LED1_Pin GPIO_PIN_0
#define STATUS_LED1_GPIO_Port GPIOA
#define STATUS_LED2_Pin GPIO_PIN_1
#define STATUS_LED2_GPIO_Port GPIOA
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */
firmware/Core/Inc/stm32g0xx_hal_conf.h
+351
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@@ -0,0 +1,351 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g0xx_hal_conf.h
* @author MCD Application Team
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32G0xx_HAL_CONF_H
#define STM32G0xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
/* #define HAL_ADC_MODULE_ENABLED */
/* #define HAL_CEC_MODULE_ENABLED */
/* #define HAL_COMP_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_EXTI_MODULE_ENABLED */
#define HAL_FDCAN_MODULE_ENABLED
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_PCD_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_SPI_MODULE_ENABLED */
/* #define HAL_TIM_MODULE_ENABLED */
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
/* ########################## Register Callbacks selection ############################## */
/**
* @brief This is the list of modules where register callback can be used
*/
#define USE_HAL_ADC_REGISTER_CALLBACKS 0u
#define USE_HAL_CEC_REGISTER_CALLBACKS 0u
#define USE_HAL_COMP_REGISTER_CALLBACKS 0u
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
#define USE_HAL_DAC_REGISTER_CALLBACKS 0u
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0u
#define USE_HAL_HCD_REGISTER_CALLBACKS 0u
#define USE_HAL_I2C_REGISTER_CALLBACKS 0u
#define USE_HAL_I2S_REGISTER_CALLBACKS 0u
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u
#define USE_HAL_PCD_REGISTER_CALLBACKS 0u
#define USE_HAL_RNG_REGISTER_CALLBACKS 0u
#define USE_HAL_RTC_REGISTER_CALLBACKS 0u
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0u
#define USE_HAL_SPI_REGISTER_CALLBACKS 0u
#define USE_HAL_TIM_REGISTER_CALLBACKS 0u
#define USE_HAL_UART_REGISTER_CALLBACKS 0u
#define USE_HAL_USART_REGISTER_CALLBACKS 0u
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0u
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE (8000000UL) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
#if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
/**
* @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
* This internal oscillator is mainly dedicated to provide a high precision clock to
* the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
* When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
* which is subject to manufacturing process variations.
*/
#if !defined (HSI48_VALUE)
#define HSI48_VALUE 48000000U /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
The real value my vary depending on manufacturing process variations.*/
#endif /* HSI48_VALUE */
#endif
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/**
* @brief External clock source for I2S1 peripheral
* This value is used by the RCC HAL module to compute the I2S1 clock source
* frequency.
*/
#if !defined (EXTERNAL_I2S1_CLOCK_VALUE)
#define EXTERNAL_I2S1_CLOCK_VALUE (48000UL) /*!< Value of the I2S1 External clock source in Hz*/
#endif /* EXTERNAL_I2S1_CLOCK_VALUE */
#if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
/**
* @brief External clock source for I2S2 peripheral
* This value is used by the RCC HAL module to compute the I2S2 clock source
* frequency.
*/
#if !defined (EXTERNAL_I2S2_CLOCK_VALUE)
#define EXTERNAL_I2S2_CLOCK_VALUE 48000U /*!< Value of the I2S2 External clock source in Hz*/
#endif /* EXTERNAL_I2S2_CLOCK_VALUE */
#endif
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY 3U /*!< tick interrupt priority */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 1U
#define INSTRUCTION_CACHE_ENABLE 1U
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* ################## CRYP peripheral configuration ########################## */
#define USE_HAL_CRYP_SUSPEND_RESUME 1U
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include modules header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32g0xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32g0xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32g0xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32g0xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32g0xx_hal_adc.h"
#include "stm32g0xx_hal_adc_ex.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32g0xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32g0xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32g0xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32g0xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32g0xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32g0xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32g0xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_FDCAN_MODULE_ENABLED
#include "stm32g0xx_hal_fdcan.h"
#endif /* HAL_FDCAN_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32g0xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32g0xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32g0xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32g0xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32g0xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32g0xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32g0xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32g0xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32g0xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32g0xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32g0xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32g0xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32g0xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32g0xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32g0xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32g0xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32g0xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for functions parameters check.
* @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t *file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* STM32G0xx_HAL_CONF_H */
firmware/Core/Inc/stm32g0xx_it.h
+67
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@@ -0,0 +1,67 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g0xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32G0xx_IT_H
#define __STM32G0xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void SVC_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void DMA1_Channel1_IRQHandler(void);
void DMA1_Channel2_3_IRQHandler(void);
void TIM16_FDCAN_IT0_IRQHandler(void);
void TIM17_FDCAN_IT1_IRQHandler(void);
void USART2_LPUART2_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32G0xx_IT_H */
firmware/Core/Inc/usart.h
+51
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@@ -0,0 +1,51 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file usart.h
* @brief This file contains all the function prototypes for
* the usart.c file
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USART_H__
#define __USART_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern UART_HandleTypeDef huart2;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_USART2_UART_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __USART_H__ */
firmware/Core/Src/ami_app.c
+687
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@@ -0,0 +1,687 @@
#include "ami_app.h"
#include "ami_protocol.h"
#include "fdcan.h"
#include "usart.h"
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#define SCREEN_RX_DMA_SIZE 64U
#define SCREEN_TX_SIZE 32U
#define TASK_QUEUE_SIZE 4U
#define DIRTY_SPEED (1UL << 0)
#define DIRTY_TS_VOLTAGE (1UL << 1)
#define DIRTY_TORQUE (1UL << 2)
#define DIRTY_TS_CURRENT (1UL << 3)
#define DIRTY_MOTOR_TEMP (1UL << 4)
#define DIRTY_MCU_TEMP (1UL << 5)
#define DIRTY_CELL_TEMP (1UL << 6)
#define DIRTY_DEBUG(n) (1UL << (8U + (n)))
#define DIRTY_DASH_ALL 0x000000FFUL
#define DIRTY_COLOR(n) (1UL << (24U + (n)))
#define DIRTY_COLOR_ALL 0xFF000000UL
#define DIRTY_DEBUG_ALL 0x00FFFF00UL
typedef struct
{
/* speed, HV V, torque, HV A, motor C, MCU C, max cell C, LV 0.01V. */
int32_t dash_value[8];
uint8_t dash_valid;
uint8_t debug_state[16];
} AmiDisplayState;
static volatile AmiDisplayState display_state;
static volatile uint32_t display_dirty;
static volatile uint32_t dash_last_rx_ms;
static volatile uint32_t debug_last_rx_ms;
static volatile uint32_t adc_last_rx_ms;
static volatile uint32_t bms_status_last_rx_ms;
static volatile uint32_t bms_temperature_last_rx_ms;
/* Preserve the exact source units even where the HMI has integer controls. */
static volatile uint16_t sdc_adc_mv;
static volatile uint16_t sdc_frequency_hz[4];
static volatile uint16_t sdc_gpio_state;
static volatile uint16_t sdc_gpio_changed;
static volatile uint32_t sdc_gpio_timestamp_ms;
static volatile bool sdc_gpio_received;
static volatile uint16_t bms_voltage_tenths;
static volatile int32_t bms_current_tenths;
static volatile uint32_t can_port_last_rx_ms[2];
static volatile uint32_t can_rx_error_count;
static volatile uint32_t uart_rx_error_count;
static uint8_t screen_rx_dma[SCREEN_RX_DMA_SIZE];
static uint8_t screen_tx_dma[SCREEN_TX_SIZE];
static volatile bool screen_tx_busy;
static uint8_t parser_pos;
static uint8_t parser_task_id;
static volatile uint8_t task_queue[TASK_QUEUE_SIZE];
static volatile uint8_t task_head;
static volatile uint8_t task_tail;
static uint8_t task_sequence;
static uint8_t task_tx_mask;
static uint8_t task_target_mask;
static volatile uint32_t task_drop_count;
static GPIO_PinState LedInactiveLevel(void)
{
return (AMI_LED_ACTIVE_LEVEL == GPIO_PIN_SET) ? GPIO_PIN_RESET : GPIO_PIN_SET;
}
static uint32_t ReadBeU16(const uint8_t *data)
{
return ((uint32_t)data[0] << 8) | (uint32_t)data[1];
}
static uint32_t ReadLeU16(const uint8_t *data)
{
return (uint32_t)data[0] | ((uint32_t)data[1] << 8);
}
static int32_t RoundTenths(int32_t value)
{
return (value >= 0) ? ((value + 5) / 10) : ((value - 5) / 10);
}
static size_t AppendUnsigned(char *dst, uint32_t value)
{
char reversed[10];
size_t count = 0U;
size_t i;
do
{
reversed[count++] = (char)('0' + (value % 10U));
value /= 10U;
} while ((value != 0U) && (count < sizeof(reversed)));
for (i = 0U; i < count; ++i)
{
dst[i] = reversed[count - 1U - i];
}
return count;
}
static size_t AppendSigned(char *dst, int32_t value)
{
uint32_t magnitude;
size_t count = 0U;
if (value < 0)
{
dst[count++] = '-';
magnitude = (uint32_t)(-(value + 1)) + 1U;
}
else
{
magnitude = (uint32_t)value;
}
return count + AppendUnsigned(&dst[count], magnitude);
}
static bool StartScreenAssignment(const char *prefix, int32_t value)
{
size_t length = strlen(prefix);
if (screen_tx_busy || (length + 14U > sizeof(screen_tx_dma)))
{
return false;
}
memcpy(screen_tx_dma, prefix, length);
length += AppendSigned((char *)&screen_tx_dma[length], value);
screen_tx_dma[length++] = 0xFFU;
screen_tx_dma[length++] = 0xFFU;
screen_tx_dma[length++] = 0xFFU;
screen_tx_busy = true;
if (HAL_UART_Transmit_DMA(&huart2, screen_tx_dma, (uint16_t)length) != HAL_OK)
{
screen_tx_busy = false;
return false;
}
return true;
}
static void RestartScreenRx(void)
{
if (HAL_UARTEx_ReceiveToIdle_DMA(&huart2, screen_rx_dma,
sizeof(screen_rx_dma)) == HAL_OK)
{
__HAL_DMA_DISABLE_IT(huart2.hdmarx, DMA_IT_HT);
}
else
{
++uart_rx_error_count;
}
}
static void QueueTaskFromIsr(uint8_t task_id)
{
uint8_t next = (uint8_t)((task_head + 1U) % TASK_QUEUE_SIZE);
if (next == task_tail)
{
++task_drop_count;
return;
}
task_queue[task_head] = task_id;
task_head = next;
}
static void ParseScreenByte(uint8_t byte)
{
static const uint8_t fixed[6] = {0xAAU, 0x55U, 0x01U, 0x00U, 0x0DU, 0x0AU};
switch (parser_pos)
{
case 0U:
parser_pos = (byte == fixed[0]) ? 1U : 0U;
break;
case 1U:
parser_pos = (byte == fixed[1]) ? 2U : ((byte == fixed[0]) ? 1U : 0U);
break;
case 2U:
parser_pos = (byte == fixed[2]) ? 3U : ((byte == fixed[0]) ? 1U : 0U);
break;
case 3U:
if ((byte >= 1U) && (byte <= 6U))
{
parser_task_id = byte;
parser_pos = 4U;
}
else
{
parser_pos = (byte == fixed[0]) ? 1U : 0U;
}
break;
case 4U:
parser_pos = (byte == fixed[4]) ? 5U : ((byte == fixed[0]) ? 1U : 0U);
break;
case 5U:
if (byte == fixed[5])
{
QueueTaskFromIsr(parser_task_id);
}
parser_pos = (byte == fixed[0]) ? 1U : 0U;
break;
default:
parser_pos = 0U;
break;
}
}
static void SetDashValid(uint32_t index, bool valid)
{
uint8_t mask = (uint8_t)(1U << index);
bool previous = (display_state.dash_valid & mask) != 0U;
if (valid != previous)
{
if (valid) { display_state.dash_valid |= mask; }
else { display_state.dash_valid &= (uint8_t)~mask; }
display_dirty |= DIRTY_COLOR(index);
}
}
static void SetDashValue(uint32_t index, int32_t value)
{
if ((display_state.dash_value[index] != value) ||
((display_state.dash_valid & (1U << index)) == 0U))
{
display_state.dash_value[index] = value;
display_dirty |= (1UL << index);
}
SetDashValid(index, true);
}
static bool DecodeCan(uint32_t identifier, uint32_t id_type,
uint32_t length, const uint8_t *data)
{
uint32_t now = HAL_GetTick();
if (id_type == FDCAN_STANDARD_ID)
{
if ((identifier == AMI_CAN_ID_SDC_ADC) && (length == 2U))
{
sdc_adc_mv = (uint16_t)ReadLeU16(data);
/* Xfloat lvbat has two decimals: mV -> hundredths of a volt. */
SetDashValue(7U, (int32_t)((sdc_adc_mv + 5U) / 10U));
adc_last_rx_ms = now;
dash_last_rx_ms = now;
return true;
}
if ((identifier == AMI_CAN_ID_SDC_HEARTBEAT) && (length == 8U) &&
(data[0] == 0xA1U) && (data[1] == 1U))
{
debug_last_rx_ms = now;
return true;
}
if ((identifier == AMI_CAN_ID_SDC_FREQUENCY) && (length == 8U))
{
for (uint32_t i = 0U; i < 4U; ++i)
{
sdc_frequency_hz[i] = (uint16_t)ReadLeU16(&data[i * 2U]);
}
/* Hz is not km/h; wheel circumference and pulses/rev are undefined. */
return true;
}
if ((identifier == AMI_CAN_ID_SDC_GPIO) && (length == 8U))
{
sdc_gpio_state = (uint16_t)(ReadLeU16(data) & 0x7FFFU);
sdc_gpio_changed = (uint16_t)(ReadLeU16(&data[2]) & 0x7FFFU);
sdc_gpio_timestamp_ms = (uint32_t)data[4] | ((uint32_t)data[5] << 8) |
((uint32_t)data[6] << 16) | ((uint32_t)data[7] << 24);
sdc_gpio_received = true;
debug_last_rx_ms = now;
/* No PD0..PD14 -> named safety signals / normal polarity mapping. */
return true;
}
if ((identifier == AMI_CAN_ID_SDC_DAC_ACK) && (length == 4U))
{
return true;
}
if ((identifier == AMI_CAN_ID_BMS_TEMPERATURE) && (length == 8U))
{
int32_t maximum = -40;
bool valid = false;
for (uint32_t i = 0U; i < 8U; ++i)
{
if (data[i] != 0xFFU)
{
int32_t temperature = (int32_t)data[i] - 40;
if (!valid || (temperature > maximum)) { maximum = temperature; }
valid = true;
}
}
if (valid) { SetDashValue(6U, maximum); }
else { SetDashValid(6U, false); }
bms_temperature_last_rx_ms = now;
dash_last_rx_ms = now;
return true;
}
}
if (((id_type == FDCAN_STANDARD_ID) && (identifier == AMI_CAN_ID_BMS_STATUS)) ||
((id_type == FDCAN_EXTENDED_ID) && (identifier == AMI_CAN_ID_BMS_STATUS_EXT)))
{
if (length != 8U) { return false; }
bms_voltage_tenths = (uint16_t)ReadBeU16(data);
bms_current_tenths = (int32_t)ReadBeU16(&data[2]) - 5000;
SetDashValue(1U, RoundTenths(bms_voltage_tenths));
SetDashValue(3U, RoundTenths(bms_current_tenths));
bms_status_last_rx_ms = now;
dash_last_rx_ms = now;
return true;
}
if ((id_type == FDCAN_EXTENDED_ID) &&
(identifier == AMI_CAN_ID_BMS_EXTREMES_EXT) && (length == 8U))
{
if (data[4] != 0xFFU) { SetDashValue(6U, (int32_t)data[4] - 40); }
else { SetDashValid(6U, false); }
bms_temperature_last_rx_ms = now;
dash_last_rx_ms = now;
/* BMS LV bytes 6..7 do not override the SDC ADC source. */
return true;
}
return false;
}
static void ConfigureCanPort(FDCAN_HandleTypeDef *hfdcan)
{
FDCAN_FilterTypeDef filter = {0};
filter.IdType = FDCAN_STANDARD_ID;
filter.FilterIndex = 0U;
filter.FilterType = FDCAN_FILTER_RANGE;
filter.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
filter.FilterID1 = AMI_CAN_ID_SDC_HEARTBEAT;
filter.FilterID2 = AMI_CAN_ID_SDC_GPIO;
if (HAL_FDCAN_ConfigFilter(hfdcan, &filter) != HAL_OK) { Error_Handler(); }
filter.FilterIndex = 1U;
filter.FilterType = FDCAN_FILTER_MASK;
filter.FilterID1 = AMI_CAN_ID_BMS_STATUS;
filter.FilterID2 = 0x7FFU;
if (HAL_FDCAN_ConfigFilter(hfdcan, &filter) != HAL_OK) { Error_Handler(); }
filter.FilterIndex = 2U;
filter.FilterID1 = AMI_CAN_ID_BMS_TEMPERATURE;
if (HAL_FDCAN_ConfigFilter(hfdcan, &filter) != HAL_OK) { Error_Handler(); }
filter.IdType = FDCAN_EXTENDED_ID;
filter.FilterIndex = 0U;
filter.FilterType = FDCAN_FILTER_DUAL;
filter.FilterID1 = AMI_CAN_ID_BMS_STATUS_EXT;
filter.FilterID2 = AMI_CAN_ID_BMS_EXTREMES_EXT;
if (HAL_FDCAN_ConfigFilter(hfdcan, &filter) != HAL_OK) { Error_Handler(); }
}
static void ConfigureCan(void)
{
ConfigureCanPort(&hfdcan1);
ConfigureCanPort(&hfdcan2);
if ((HAL_FDCAN_ConfigGlobalFilter(&hfdcan1, FDCAN_REJECT, FDCAN_REJECT,
FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE) != HAL_OK) ||
(HAL_FDCAN_ConfigGlobalFilter(&hfdcan2, FDCAN_REJECT, FDCAN_REJECT,
FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE) != HAL_OK) ||
(HAL_FDCAN_ActivateNotification(&hfdcan1,
FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0U) != HAL_OK) ||
(HAL_FDCAN_ActivateNotification(&hfdcan2,
FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0U) != HAL_OK) ||
(HAL_FDCAN_Start(&hfdcan1) != HAL_OK) ||
(HAL_FDCAN_Start(&hfdcan2) != HAL_OK))
{
Error_Handler();
}
}
static void SendPendingTask(void)
{
FDCAN_TxHeaderTypeDef header = {0};
uint8_t data[8];
uint8_t task_id;
uint32_t now;
if (task_tail == task_head)
{
return;
}
task_id = task_queue[task_tail];
now = HAL_GetTick();
if (task_target_mask == 0U)
{
if ((can_port_last_rx_ms[0] != 0U) &&
((now - can_port_last_rx_ms[0]) <= AMI_CAN_DATA_TIMEOUT_MS))
{
task_target_mask |= 0x01U;
}
if ((can_port_last_rx_ms[1] != 0U) &&
((now - can_port_last_rx_ms[1]) <= AMI_CAN_DATA_TIMEOUT_MS))
{
task_target_mask |= 0x02U;
}
if (task_target_mask == 0U)
{
task_target_mask = 0x03U;
}
}
data[0] = 1U;
data[1] = task_id;
data[2] = task_sequence;
data[3] = 1U;
data[4] = (uint8_t)now;
data[5] = (uint8_t)(now >> 8);
data[6] = (uint8_t)(now >> 16);
data[7] = (uint8_t)(now >> 24);
header.Identifier = AMI_CAN_ID_TASK_REQUEST;
header.IdType = FDCAN_STANDARD_ID;
header.TxFrameType = FDCAN_DATA_FRAME;
header.DataLength = FDCAN_DLC_BYTES_8;
header.ErrorStateIndicator = FDCAN_ESI_ACTIVE;
header.BitRateSwitch = FDCAN_BRS_OFF;
header.FDFormat = FDCAN_CLASSIC_CAN;
header.TxEventFifoControl = FDCAN_NO_TX_EVENTS;
header.MessageMarker = 0U;
if (((task_target_mask & 0x01U) != 0U) && ((task_tx_mask & 0x01U) == 0U) &&
(HAL_FDCAN_GetTxFifoFreeLevel(&hfdcan1) > 0U) &&
(HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan1, &header, data) == HAL_OK))
{
task_tx_mask |= 0x01U;
}
if (((task_target_mask & 0x02U) != 0U) && ((task_tx_mask & 0x02U) == 0U) &&
(HAL_FDCAN_GetTxFifoFreeLevel(&hfdcan2) > 0U) &&
(HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan2, &header, data) == HAL_OK))
{
task_tx_mask |= 0x02U;
}
if ((task_tx_mask & task_target_mask) == task_target_mask)
{
task_tail = (uint8_t)((task_tail + 1U) % TASK_QUEUE_SIZE);
++task_sequence;
task_tx_mask = 0U;
task_target_mask = 0U;
}
}
static void UpdateTimeoutsAndLeds(void)
{
static uint32_t last_heartbeat_ms;
static bool debug_timeout_applied;
uint32_t now = HAL_GetTick();
bool dash_timeout = (dash_last_rx_ms == 0U) ||
((now - dash_last_rx_ms) > AMI_CAN_DATA_TIMEOUT_MS);
bool debug_timeout = (debug_last_rx_ms == 0U) ||
((now - debug_last_rx_ms) > AMI_CAN_DATA_TIMEOUT_MS);
if ((now - last_heartbeat_ms) >= 500U)
{
HAL_GPIO_TogglePin(STATUS_LED1_GPIO_Port, STATUS_LED1_Pin);
last_heartbeat_ms = now;
}
HAL_GPIO_WritePin(STATUS_LED2_GPIO_Port, STATUS_LED2_Pin,
(dash_timeout || debug_timeout) ? AMI_LED_ACTIVE_LEVEL
: LedInactiveLevel());
/* Each physical source expires separately; other traffic cannot refresh it. */
__disable_irq();
/* Sample time after excluding RX IRQs: a newer timestamp must not underflow. */
now = HAL_GetTick();
if ((adc_last_rx_ms == 0U) || ((now - adc_last_rx_ms) > AMI_ADC_TIMEOUT_MS))
{
SetDashValid(7U, false);
}
if ((bms_status_last_rx_ms == 0U) || ((now - bms_status_last_rx_ms) > AMI_BMS_TIMEOUT_MS))
{
SetDashValid(1U, false);
SetDashValid(3U, false);
}
if ((bms_temperature_last_rx_ms == 0U) ||
((now - bms_temperature_last_rx_ms) > AMI_BMS_TIMEOUT_MS))
{
SetDashValid(6U, false);
}
__enable_irq();
if (debug_timeout && !debug_timeout_applied)
{
uint32_t i;
__disable_irq();
for (i = 0U; i < 16U; ++i)
{
display_state.debug_state[i] = 0U;
}
display_dirty |= DIRTY_DEBUG_ALL;
__enable_irq();
debug_timeout_applied = true;
}
else if (!debug_timeout)
{
debug_timeout_applied = false;
}
}
static void SendNextDirtyValue(void)
{
static const char *const dash_prefix[8] = {
"dash.speed.val=", "dash.ts.val=", "dash.mct.val=", "dash.dl.val=",
"dash.djwd.val=", "dash.mcuwd.val=", "dash.dtwd.val=", "dash.lvbat.val="
};
static const char *const color_prefix[8] = {
"dash.speed.pco=", "dash.ts.pco=", "dash.mct.pco=", "dash.dl.pco=",
"dash.djwd.pco=", "dash.mcuwd.pco=", "dash.dtwd.pco=", "dash.lvbat.pco="
};
static uint32_t cursor;
uint32_t dirty;
uint32_t bit;
uint32_t index;
int32_t value;
const char *prefix;
char debug_prefix[5] = {'d', '0', '=', '\0', '\0'};
if (screen_tx_busy || (HAL_GetTick() < AMI_SCREEN_BOOT_DELAY_MS))
{
return;
}
__disable_irq();
dirty = display_dirty;
__enable_irq();
if (dirty == 0U)
{
return;
}
/* Fair rotation prevents rapid source updates from starving other fields. */
for (uint32_t offset = 0U; offset < 32U; ++offset)
{
index = (cursor + offset) & 31U;
if ((dirty & (1UL << index)) != 0U) { break; }
}
bit = 1UL << index;
cursor = (index + 1U) & 31U;
__disable_irq();
if (index < 8U)
{
value = display_state.dash_value[index];
prefix = dash_prefix[index];
}
else if (index >= 24U)
{
uint32_t dash_index = index - 24U;
value = (display_state.dash_valid & (1U << dash_index)) ? 65535 : 16904;
prefix = color_prefix[dash_index];
}
else
{
uint32_t debug_index = index - 8U;
value = display_state.debug_state[debug_index];
if (debug_index >= 10U)
{
debug_prefix[1] = '1';
debug_prefix[2] = (char)('0' + (debug_index - 10U));
debug_prefix[3] = '=';
prefix = debug_prefix;
}
else
{
debug_prefix[1] = (char)('0' + debug_index);
prefix = debug_prefix;
}
}
display_dirty &= ~bit;
__enable_irq();
if (!StartScreenAssignment(prefix, value))
{
__disable_irq();
display_dirty |= bit;
__enable_irq();
}
}
void AMI_App_Init(void)
{
HAL_GPIO_WritePin(STATUS_LED1_GPIO_Port, STATUS_LED1_Pin, LedInactiveLevel());
HAL_GPIO_WritePin(STATUS_LED2_GPIO_Port, STATUS_LED2_Pin, AMI_LED_ACTIVE_LEVEL);
display_dirty = DIRTY_DASH_ALL | DIRTY_DEBUG_ALL | DIRTY_COLOR_ALL;
ConfigureCan();
RestartScreenRx();
}
void AMI_App_Service(void)
{
static uint32_t last_screen_sync_ms;
uint32_t now = HAL_GetTick();
SendPendingTask();
UpdateTimeoutsAndLeds();
/* The HMI may reboot/reconnect after the MCU has already sent its state. */
if ((now - last_screen_sync_ms) >= AMI_SCREEN_RESYNC_MS)
{
__disable_irq();
display_dirty |= DIRTY_DASH_ALL | DIRTY_DEBUG_ALL | DIRTY_COLOR_ALL;
__enable_irq();
last_screen_sync_ms = now;
}
SendNextDirtyValue();
}
void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan,
uint32_t rx_fifo0_its)
{
FDCAN_RxHeaderTypeDef header;
uint8_t data[64]; /* HAL copies payload before validation, including FD DLCs. */
if ((rx_fifo0_its & FDCAN_IT_RX_FIFO0_NEW_MESSAGE) == 0U)
{
return;
}
while (HAL_FDCAN_GetRxFifoFillLevel(hfdcan, FDCAN_RX_FIFO0) > 0U)
{
if (HAL_FDCAN_GetRxMessage(hfdcan, FDCAN_RX_FIFO0, &header, data) != HAL_OK)
{
++can_rx_error_count;
break;
}
if ((header.RxFrameType != FDCAN_DATA_FRAME) ||
(header.FDFormat != FDCAN_CLASSIC_CAN) ||
(header.DataLength > FDCAN_DLC_BYTES_8))
{
continue;
}
if (DecodeCan(header.Identifier, header.IdType, header.DataLength, data))
{
can_port_last_rx_ms[(hfdcan->Instance == FDCAN1) ? 0U : 1U] = HAL_GetTick();
}
}
}
void HAL_FDCAN_ErrorCallback(FDCAN_HandleTypeDef *hfdcan)
{
(void)hfdcan;
++can_rx_error_count;
}
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t size)
{
uint16_t i;
if (huart->Instance != USART2)
{
return;
}
for (i = 0U; i < size; ++i)
{
ParseScreenByte(screen_rx_dma[i]);
}
RestartScreenRx();
}
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
{
if (huart->Instance == USART2)
{
screen_tx_busy = false;
}
}
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
if (huart->Instance == USART2)
{
++uart_rx_error_count;
(void)HAL_UART_AbortReceive(huart);
RestartScreenRx();
}
}
firmware/Core/Src/dma.c
+57
View File
@@ -0,0 +1,57 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dma.c
* @brief This file provides code for the configuration
* of all the requested memory to memory DMA transfers.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "dma.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure DMA */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/**
* Enable DMA controller clock
*/
void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
/* DMA1_Channel2_3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
firmware/Core/Src/fdcan.c
+285
View File
@@ -0,0 +1,285 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file fdcan.c
* @brief This file provides code for the configuration
* of the FDCAN instances.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "fdcan.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
FDCAN_HandleTypeDef hfdcan1;
FDCAN_HandleTypeDef hfdcan2;
/* FDCAN1 init function */
void MX_FDCAN1_Init(void)
{
/* USER CODE BEGIN FDCAN1_Init 0 */
/* USER CODE END FDCAN1_Init 0 */
/* USER CODE BEGIN FDCAN1_Init 1 */
/* USER CODE END FDCAN1_Init 1 */
hfdcan1.Instance = FDCAN1;
hfdcan1.Init.ClockDivider = FDCAN_CLOCK_DIV1;
hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
hfdcan1.Init.Mode = FDCAN_MODE_NORMAL;
hfdcan1.Init.AutoRetransmission = ENABLE;
hfdcan1.Init.TransmitPause = DISABLE;
hfdcan1.Init.ProtocolException = DISABLE;
hfdcan1.Init.NominalPrescaler = 8;
hfdcan1.Init.NominalSyncJumpWidth = 1;
hfdcan1.Init.NominalTimeSeg1 = 13;
hfdcan1.Init.NominalTimeSeg2 = 2;
hfdcan1.Init.DataPrescaler = 8;
hfdcan1.Init.DataSyncJumpWidth = 1;
hfdcan1.Init.DataTimeSeg1 = 13;
hfdcan1.Init.DataTimeSeg2 = 2;
hfdcan1.Init.StdFiltersNbr = 3;
hfdcan1.Init.ExtFiltersNbr = 1;
hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN FDCAN1_Init 2 */
/* USER CODE END FDCAN1_Init 2 */
}
/* FDCAN2 init function */
void MX_FDCAN2_Init(void)
{
/* USER CODE BEGIN FDCAN2_Init 0 */
/* USER CODE END FDCAN2_Init 0 */
/* USER CODE BEGIN FDCAN2_Init 1 */
/* USER CODE END FDCAN2_Init 1 */
hfdcan2.Instance = FDCAN2;
hfdcan2.Init.ClockDivider = FDCAN_CLOCK_DIV1;
hfdcan2.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
hfdcan2.Init.Mode = FDCAN_MODE_NORMAL;
hfdcan2.Init.AutoRetransmission = ENABLE;
hfdcan2.Init.TransmitPause = DISABLE;
hfdcan2.Init.ProtocolException = DISABLE;
hfdcan2.Init.NominalPrescaler = 8;
hfdcan2.Init.NominalSyncJumpWidth = 1;
hfdcan2.Init.NominalTimeSeg1 = 13;
hfdcan2.Init.NominalTimeSeg2 = 2;
hfdcan2.Init.DataPrescaler = 8;
hfdcan2.Init.DataSyncJumpWidth = 1;
hfdcan2.Init.DataTimeSeg1 = 13;
hfdcan2.Init.DataTimeSeg2 = 2;
hfdcan2.Init.StdFiltersNbr = 3;
hfdcan2.Init.ExtFiltersNbr = 1;
hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN FDCAN2_Init 2 */
/* USER CODE END FDCAN2_Init 2 */
}
static uint32_t HAL_RCC_FDCAN_CLK_ENABLED=0;
void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(fdcanHandle->Instance==FDCAN1)
{
/* USER CODE BEGIN FDCAN1_MspInit 0 */
/* USER CODE END FDCAN1_MspInit 0 */
/** Initializes the peripherals clocks
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
PeriphClkInit.FdcanClockSelection = RCC_FDCANCLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
/* FDCAN1 clock enable */
HAL_RCC_FDCAN_CLK_ENABLED++;
if(HAL_RCC_FDCAN_CLK_ENABLED==1){
__HAL_RCC_FDCAN_CLK_ENABLE();
}
__HAL_RCC_GPIOA_CLK_ENABLE();
/**FDCAN1 GPIO Configuration
PA11 [PA9] ------> FDCAN1_RX
PA12 [PA10] ------> FDCAN1_TX
*/
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF3_FDCAN1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* FDCAN1 interrupt Init */
HAL_NVIC_SetPriority(TIM16_FDCAN_IT0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM16_FDCAN_IT0_IRQn);
HAL_NVIC_SetPriority(TIM17_FDCAN_IT1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM17_FDCAN_IT1_IRQn);
/* USER CODE BEGIN FDCAN1_MspInit 1 */
/* USER CODE END FDCAN1_MspInit 1 */
}
else if(fdcanHandle->Instance==FDCAN2)
{
/* USER CODE BEGIN FDCAN2_MspInit 0 */
/* USER CODE END FDCAN2_MspInit 0 */
/** Initializes the peripherals clocks
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
PeriphClkInit.FdcanClockSelection = RCC_FDCANCLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
/* FDCAN2 clock enable */
HAL_RCC_FDCAN_CLK_ENABLED++;
if(HAL_RCC_FDCAN_CLK_ENABLED==1){
__HAL_RCC_FDCAN_CLK_ENABLE();
}
__HAL_RCC_GPIOB_CLK_ENABLE();
/**FDCAN2 GPIO Configuration
PB0 ------> FDCAN2_RX
PB1 ------> FDCAN2_TX
*/
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF3_FDCAN2;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* FDCAN2 interrupt Init */
HAL_NVIC_SetPriority(TIM16_FDCAN_IT0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM16_FDCAN_IT0_IRQn);
HAL_NVIC_SetPriority(TIM17_FDCAN_IT1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM17_FDCAN_IT1_IRQn);
/* USER CODE BEGIN FDCAN2_MspInit 1 */
/* USER CODE END FDCAN2_MspInit 1 */
}
}
void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* fdcanHandle)
{
if(fdcanHandle->Instance==FDCAN1)
{
/* USER CODE BEGIN FDCAN1_MspDeInit 0 */
/* USER CODE END FDCAN1_MspDeInit 0 */
/* Peripheral clock disable */
HAL_RCC_FDCAN_CLK_ENABLED--;
if(HAL_RCC_FDCAN_CLK_ENABLED==0){
__HAL_RCC_FDCAN_CLK_DISABLE();
}
/**FDCAN1 GPIO Configuration
PA11 [PA9] ------> FDCAN1_RX
PA12 [PA10] ------> FDCAN1_TX
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12);
/* FDCAN1 interrupt Deinit */
/* USER CODE BEGIN FDCAN1:TIM16_FDCAN_IT0_IRQn disable */
/**
* Uncomment the line below to disable the "TIM16_FDCAN_IT0_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM16_FDCAN_IT0_IRQn); */
/* USER CODE END FDCAN1:TIM16_FDCAN_IT0_IRQn disable */
/* USER CODE BEGIN FDCAN1:TIM17_FDCAN_IT1_IRQn disable */
/**
* Uncomment the line below to disable the "TIM17_FDCAN_IT1_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM17_FDCAN_IT1_IRQn); */
/* USER CODE END FDCAN1:TIM17_FDCAN_IT1_IRQn disable */
/* USER CODE BEGIN FDCAN1_MspDeInit 1 */
/* USER CODE END FDCAN1_MspDeInit 1 */
}
else if(fdcanHandle->Instance==FDCAN2)
{
/* USER CODE BEGIN FDCAN2_MspDeInit 0 */
/* USER CODE END FDCAN2_MspDeInit 0 */
/* Peripheral clock disable */
HAL_RCC_FDCAN_CLK_ENABLED--;
if(HAL_RCC_FDCAN_CLK_ENABLED==0){
__HAL_RCC_FDCAN_CLK_DISABLE();
}
/**FDCAN2 GPIO Configuration
PB0 ------> FDCAN2_RX
PB1 ------> FDCAN2_TX
*/
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1);
/* FDCAN2 interrupt Deinit */
/* USER CODE BEGIN FDCAN2:TIM16_FDCAN_IT0_IRQn disable */
/**
* Uncomment the line below to disable the "TIM16_FDCAN_IT0_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM16_FDCAN_IT0_IRQn); */
/* USER CODE END FDCAN2:TIM16_FDCAN_IT0_IRQn disable */
/* USER CODE BEGIN FDCAN2:TIM17_FDCAN_IT1_IRQn disable */
/**
* Uncomment the line below to disable the "TIM17_FDCAN_IT1_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM17_FDCAN_IT1_IRQn); */
/* USER CODE END FDCAN2:TIM17_FDCAN_IT1_IRQn disable */
/* USER CODE BEGIN FDCAN2_MspDeInit 1 */
/* USER CODE END FDCAN2_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
firmware/Core/Src/gpio.c
+65
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@@ -0,0 +1,65 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.c
* @brief This file provides code for the configuration
* of all used GPIO pins.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "gpio.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure GPIO */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/** Configure pins as
* Analog
* Input
* Output
* EVENT_OUT
* EXTI
*/
void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, STATUS_LED1_Pin|STATUS_LED2_Pin, GPIO_PIN_RESET);
/*Configure GPIO pins : STATUS_LED1_Pin STATUS_LED2_Pin */
GPIO_InitStruct.Pin = STATUS_LED1_Pin|STATUS_LED2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
firmware/Core/Src/main.c
+192
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "dma.h"
#include "fdcan.h"
#include "usart.h"
#include "gpio.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "ami_app.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
MX_FDCAN1_Init();
MX_FDCAN2_Init();
MX_USART2_UART_Init();
/* USER CODE BEGIN 2 */
AMI_App_Init();
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
AMI_App_Service();
__WFI();
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
RCC_OscInitStruct.PLL.PLLN = 16;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
{
Error_Handler();
}
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
firmware/Core/Src/stm32g0xx_hal_msp.c
+90
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@@ -0,0 +1,90 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g0xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
/* SVC_IRQn interrupt configuration */
HAL_NVIC_SetPriority(SVC_IRQn, 3, 0);
/* PendSV_IRQn interrupt configuration */
HAL_NVIC_SetPriority(PendSV_IRQn, 3, 0);
/** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
*/
HAL_SYSCFG_StrobeDBattpinsConfig(SYSCFG_CFGR1_UCPD1_STROBE | SYSCFG_CFGR1_UCPD2_STROBE);
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
firmware/Core/Src/stm32g0xx_it.c
+221
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@@ -0,0 +1,221 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g0xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32g0xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern FDCAN_HandleTypeDef hfdcan1;
extern FDCAN_HandleTypeDef hfdcan2;
extern DMA_HandleTypeDef hdma_usart2_tx;
extern DMA_HandleTypeDef hdma_usart2_rx;
extern UART_HandleTypeDef huart2;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M0+ Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVC_IRQn 0 */
/* USER CODE END SVC_IRQn 0 */
/* USER CODE BEGIN SVC_IRQn 1 */
/* USER CODE END SVC_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32G0xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32g0xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 channel 1 interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart2_tx);
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel 2 and channel 3 interrupts.
*/
void DMA1_Channel2_3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
/* USER CODE END DMA1_Channel2_3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart2_rx);
/* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
/* USER CODE END DMA1_Channel2_3_IRQn 1 */
}
/**
* @brief This function handles TIM16, FDCAN1_IT0 and FDCAN2_IT0 Interrupt.
*/
void TIM16_FDCAN_IT0_IRQHandler(void)
{
/* USER CODE BEGIN TIM16_FDCAN_IT0_IRQn 0 */
/* USER CODE END TIM16_FDCAN_IT0_IRQn 0 */
HAL_FDCAN_IRQHandler(&hfdcan1);
HAL_FDCAN_IRQHandler(&hfdcan2);
/* USER CODE BEGIN TIM16_FDCAN_IT0_IRQn 1 */
/* USER CODE END TIM16_FDCAN_IT0_IRQn 1 */
}
/**
* @brief This function handles TIM17, FDCAN1_IT1 and FDCAN2_IT1 Interrupt.
*/
void TIM17_FDCAN_IT1_IRQHandler(void)
{
/* USER CODE BEGIN TIM17_FDCAN_IT1_IRQn 0 */
/* USER CODE END TIM17_FDCAN_IT1_IRQn 0 */
HAL_FDCAN_IRQHandler(&hfdcan1);
HAL_FDCAN_IRQHandler(&hfdcan2);
/* USER CODE BEGIN TIM17_FDCAN_IT1_IRQn 1 */
/* USER CODE END TIM17_FDCAN_IT1_IRQn 1 */
}
/**
* @brief This function handles USART2 + LPUART2 Interrupt.
*/
void USART2_LPUART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_LPUART2_IRQn 0 */
/* USER CODE END USART2_LPUART2_IRQn 0 */
HAL_UART_IRQHandler(&huart2);
/* USER CODE BEGIN USART2_LPUART2_IRQn 1 */
/* USER CODE END USART2_LPUART2_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
firmware/Core/Src/syscalls.c
+244
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@@ -0,0 +1,244 @@
/**
******************************************************************************
* @file syscalls.c
* @author Auto-generated by STM32CubeMX
* @brief Minimal System calls file
*
* For more information about which c-functions
* need which of these lowlevel functions
* please consult the Newlib or Picolibc libc-manual
******************************************************************************
* @attention
*
* Copyright (c) 2020-2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <sys/stat.h>
#include <stdlib.h>
#include <errno.h>
#include <stdio.h>
#include <signal.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>
/* Variables */
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
char *__env[1] = { 0 };
char **environ = __env;
/* Functions */
void initialise_monitor_handles()
{
}
int _getpid(void)
{
return 1;
}
int _kill(int pid, int sig)
{
(void)pid;
(void)sig;
errno = EINVAL;
return -1;
}
void _exit (int status)
{
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}
return len;
}
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}
int _close(int file)
{
(void)file;
return -1;
}
int _fstat(int file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file)
{
(void)file;
return 1;
}
int _lseek(int file, int ptr, int dir)
{
(void)file;
(void)ptr;
(void)dir;
return 0;
}
int _open(char *path, int flags, ...)
{
(void)path;
(void)flags;
/* Pretend like we always fail */
return -1;
}
int _wait(int *status)
{
(void)status;
errno = ECHILD;
return -1;
}
int _unlink(char *name)
{
(void)name;
errno = ENOENT;
return -1;
}
clock_t _times(struct tms *buf)
{
(void)buf;
return -1;
}
int _stat(const char *file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new)
{
(void)old;
(void)new;
errno = EMLINK;
return -1;
}
int _fork(void)
{
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env)
{
(void)name;
(void)argv;
(void)env;
errno = ENOMEM;
return -1;
}
// --- Picolibc Specific Section ---
#if defined(__PICOLIBC__)
/**
* @brief Picolibc helper function to output a character to a FILE stream.
* This redirects the output to the low-level __io_putchar function.
* @param c Character to write.
* @param file FILE stream pointer (ignored).
* @retval int The character written.
*/
static int starm_putc(char c, FILE *file)
{
(void) file;
__io_putchar(c);
return c;
}
/**
* @brief Picolibc helper function to input a character from a FILE stream.
* This redirects the input from the low-level __io_getchar function.
* @param file FILE stream pointer (ignored).
* @retval int The character read, cast to an unsigned char then int.
*/
static int starm_getc(FILE *file)
{
unsigned char c;
(void) file;
c = __io_getchar();
return c;
}
// Define and initialize the standard I/O streams for Picolibc.
// FDEV_SETUP_STREAM connects the starm_putc and starm_getc helper functions to a FILE structure.
// _FDEV_SETUP_RW indicates the stream is for reading and writing.
static FILE __stdio = FDEV_SETUP_STREAM(starm_putc,
starm_getc,
NULL,
_FDEV_SETUP_RW);
// Assign the standard stream pointers (stdin, stdout, stderr) to the initialized stream.
// Picolibc uses these pointers for standard I/O operations (printf, scanf, etc.).
FILE *const stdin = &__stdio;
__strong_reference(stdin, stdout);
__strong_reference(stdin, stderr);
// Create strong aliases mapping standard C library function names (without underscore)
// to the implemented system call stubs (with underscore). Picolibc uses these
// standard names internally, so this linking is required.
__strong_reference(_read, read);
__strong_reference(_write, write);
__strong_reference(_times, times);
__strong_reference(_execve, execve);
__strong_reference(_fork, fork);
__strong_reference(_link, link);
__strong_reference(_unlink, unlink);
__strong_reference(_stat, stat);
__strong_reference(_wait, wait);
__strong_reference(_open, open);
__strong_reference(_close, close);
__strong_reference(_lseek, lseek);
__strong_reference(_isatty, isatty);
__strong_reference(_fstat, fstat);
__strong_reference(_exit, exit);
__strong_reference(_kill, kill);
__strong_reference(_getpid, getpid);
#endif //__PICOLIBC__
firmware/Core/Src/sysmem.c
+87
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@@ -0,0 +1,87 @@
/**
******************************************************************************
* @file sysmem.c
* @author Generated by STM32CubeMX
* @brief System Memory calls file
*
* For more information about which C functions
* need which of these lowlevel functions
* please consult the Newlib or Picolibc libc manual
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <errno.h>
#include <stdint.h>
#include <stddef.h>
/**
* Pointer to the current high watermark of the heap usage
*/
static uint8_t *__sbrk_heap_end = NULL;
/**
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
* and others from the C library
*
* @verbatim
* ############################################################################
* # .data # .bss # newlib heap # MSP stack #
* # # # # Reserved by _Min_Stack_Size #
* ############################################################################
* ^-- RAM start ^-- _end _estack, RAM end --^
* @endverbatim
*
* This implementation starts allocating at the '_end' linker symbol
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
* The implementation considers '_estack' linker symbol to be RAM end
* NOTE: If the MSP stack, at any point during execution, grows larger than the
* reserved size, please increase the '_Min_Stack_Size'.
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
const uint8_t *max_heap = (uint8_t *)stack_limit;
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
{
__sbrk_heap_end = &_end;
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
{
errno = ENOMEM;
return (void *)-1;
}
prev_heap_end = __sbrk_heap_end;
__sbrk_heap_end += incr;
return (void *)prev_heap_end;
}
#if defined(__PICOLIBC__)
// Picolibc expects syscalls without the leading underscore.
// This creates a strong alias so that
// calls to `sbrk()` are resolved to our `_sbrk()` implementation.
__strong_reference(_sbrk, sbrk);
#endif
firmware/Core/Src/system_stm32g0xx.c
+302
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/**
******************************************************************************
* @file system_stm32g0xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32g0xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* After each device reset the HSI (8 MHz then 16 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32g0xx.s" file, to
* configure the system clock before to branch to main program.
*
* This file configures the system clock as follows:
*=============================================================================
*-----------------------------------------------------------------------------
* System Clock source | HSI
*-----------------------------------------------------------------------------
* SYSCLK(Hz) | 16000000
*-----------------------------------------------------------------------------
* HCLK(Hz) | 16000000
*-----------------------------------------------------------------------------
* AHB Prescaler | 1
*-----------------------------------------------------------------------------
* APB Prescaler | 1
*-----------------------------------------------------------------------------
* HSI Division factor | 1
*-----------------------------------------------------------------------------
* PLL_M | 1
*-----------------------------------------------------------------------------
* PLL_N | 8
*-----------------------------------------------------------------------------
* PLL_P | 7
*-----------------------------------------------------------------------------
* PLL_Q | 2
*-----------------------------------------------------------------------------
* PLL_R | 2
*-----------------------------------------------------------------------------
* Require 48MHz for RNG | Disabled
*-----------------------------------------------------------------------------
*=============================================================================
******************************************************************************
* @attention
*
* Copyright (c) 2018-2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32g0xx_system
* @{
*/
/** @addtogroup STM32G0xx_System_Private_Includes
* @{
*/
#include "stm32g0xx.h"
#if !defined (HSE_VALUE)
#define HSE_VALUE (8000000UL) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
#if !defined (LSI_VALUE)
#define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/
#endif /* LSI_VALUE */
#if !defined (LSE_VALUE)
#define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/
#endif /* LSE_VALUE */
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Private_Defines
* @{
*/
/************************* Miscellaneous Configuration ************************/
/* Note: Following vector table addresses must be defined in line with linker
configuration. */
/*!< Uncomment the following line if you need to relocate the vector table
anywhere in Flash or Sram, else the vector table is kept at the automatic
remap of boot address selected */
/* #define USER_VECT_TAB_ADDRESS */
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Private_Variables
* @{
*/
/* The SystemCoreClock variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000UL;
const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL};
const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL};
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation */
#endif /* USER_VECT_TAB_ADDRESS */
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) / HSI division factor
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
*
* - If SYSCLK source is LSI, SystemCoreClock will contain the LSI_VALUE
*
* - If SYSCLK source is LSE, SystemCoreClock will contain the LSE_VALUE
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (**) HSI_VALUE is a constant defined in stm32g0xx_hal_conf.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (***) HSE_VALUE is a constant defined in stm32g0xx_hal_conf.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
*
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void)
{
uint32_t tmp;
uint32_t pllvco;
uint32_t pllr;
uint32_t pllsource;
uint32_t pllm;
uint32_t hsidiv;
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
{
case RCC_CFGR_SWS_0: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */
SystemCoreClock = LSI_VALUE;
break;
case RCC_CFGR_SWS_2: /* LSE used as system clock */
SystemCoreClock = LSE_VALUE;
break;
case RCC_CFGR_SWS_1: /* PLL used as system clock */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLR
*/
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1UL;
if(pllsource == 0x03UL) /* HSE used as PLL clock source */
{
pllvco = (HSE_VALUE / pllm);
}
else /* HSI used as PLL clock source */
{
pllvco = (HSI_VALUE / pllm);
}
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1UL);
SystemCoreClock = pllvco/pllr;
break;
case 0x00000000U: /* HSI used as system clock */
default: /* HSI used as system clock */
hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos));
SystemCoreClock = (HSI_VALUE/hsidiv);
break;
}
/* Compute HCLK clock frequency --------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
firmware/Core/Src/usart.c
+186
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file usart.c
* @brief This file provides code for the configuration
* of the USART instances.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "usart.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
UART_HandleTypeDef huart2;
DMA_HandleTypeDef hdma_usart2_tx;
DMA_HandleTypeDef hdma_usart2_rx;
/* USART2 init function */
void MX_USART2_UART_Init(void)
{
/* USER CODE BEGIN USART2_Init 0 */
/* USER CODE END USART2_Init 0 */
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
huart2.Instance = USART2;
huart2.Init.BaudRate = 9600;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
huart2.Init.StopBits = UART_STOPBITS_1;
huart2.Init.Parity = UART_PARITY_NONE;
huart2.Init.Mode = UART_MODE_TX_RX;
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart2) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
}
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(uartHandle->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/** Initializes the peripherals clocks
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
/* USART2 clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF1_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART2 DMA Init */
/* USART2_TX Init */
hdma_usart2_tx.Instance = DMA1_Channel1;
hdma_usart2_tx.Init.Request = DMA_REQUEST_USART2_TX;
hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart2_tx.Init.Mode = DMA_NORMAL;
hdma_usart2_tx.Init.Priority = DMA_PRIORITY_HIGH;
if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx);
/* USART2_RX Init */
hdma_usart2_rx.Instance = DMA1_Channel2;
hdma_usart2_rx.Init.Request = DMA_REQUEST_USART2_RX;
hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart2_rx.Init.Mode = DMA_NORMAL;
hdma_usart2_rx.Init.Priority = DMA_PRIORITY_HIGH;
if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx);
/* USART2 interrupt Init */
HAL_NVIC_SetPriority(USART2_LPUART2_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(USART2_LPUART2_IRQn);
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
}
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
{
if(uartHandle->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
/* USART2 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmatx);
HAL_DMA_DeInit(uartHandle->hdmarx);
/* USART2 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART2_LPUART2_IRQn);
/* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g030xx.h
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/**
******************************************************************************
* @file stm32g0xx.h
* @author MCD Application Team
* @brief CMSIS STM32G0xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
* is using in the C source code, usually in main.c. This file contains:
* - Configuration section that allows to select:
* - The STM32G0xx device used in the target application
* - To use or not the peripherals drivers in application code(i.e.
* code will be based on direct access to peripherals registers
* rather than drivers API), this option is controlled by
* "#define USE_HAL_DRIVER"
*
******************************************************************************
* @attention
*
* Copyright (c) 2018-2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32g0xx
* @{
*/
#ifndef STM32G0xx_H
#define STM32G0xx_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/** @addtogroup Library_configuration_section
* @{
*/
/**
* @brief STM32 Family
*/
#if !defined (STM32G0)
#define STM32G0
#endif /* STM32G0 */
/* Uncomment the line below according to the target STM32G0 device used in your
application
*/
#if !defined (STM32G071xx) && !defined (STM32G081xx) && !defined (STM32G070xx) \
&& !defined (STM32G030xx) && !defined (STM32G031xx) && !defined (STM32G041xx) \
&& !defined (STM32G0B0xx) && !defined (STM32G0B1xx) && !defined (STM32G0C1xx) \
&& !defined (STM32G050xx) && !defined (STM32G051xx) && !defined (STM32G061xx)
/* #define STM32G0B0xx */ /*!< STM32G0B0xx Devices */
/* #define STM32G0B1xx */ /*!< STM32G0B1xx Devices */
/* #define STM32G0C1xx */ /*!< STM32G0C1xx Devices */
/* #define STM32G070xx */ /*!< STM32G070xx Devices */
/* #define STM32G071xx */ /*!< STM32G071xx Devices */
/* #define STM32G081xx */ /*!< STM32G081xx Devices */
/* #define STM32G050xx */ /*!< STM32G050xx Devices */
/* #define STM32G051xx */ /*!< STM32G051xx Devices */
/* #define STM32G061xx */ /*!< STM32G061xx Devices */
/* #define STM32G030xx */ /*!< STM32G030xx Devices */
/* #define STM32G031xx */ /*!< STM32G031xx Devices */
/* #define STM32G041xx */ /*!< STM32G041xx Devices */
#endif
/* Tip: To avoid modifying this file each time you need to switch between these
devices, you can define the device in your toolchain compiler preprocessor.
*/
#if !defined (USE_HAL_DRIVER)
/**
* @brief Comment the line below if you will not use the peripherals drivers.
In this case, these drivers will not be included and the application code will
be based on direct access to peripherals registers
*/
/*#define USE_HAL_DRIVER */
#endif /* USE_HAL_DRIVER */
/**
* @brief CMSIS Device version number $VERSION$
*/
#define __STM32G0_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32G0_CMSIS_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */
#define __STM32G0_CMSIS_VERSION_SUB2 (0x04U) /*!< [15:8] sub2 version */
#define __STM32G0_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32G0_CMSIS_VERSION ((__STM32G0_CMSIS_VERSION_MAIN << 24)\
|(__STM32G0_CMSIS_VERSION_SUB1 << 16)\
|(__STM32G0_CMSIS_VERSION_SUB2 << 8 )\
|(__STM32G0_CMSIS_VERSION_RC))
/**
* @}
*/
/** @addtogroup Device_Included
* @{
*/
#if defined(STM32G0B1xx)
#include "stm32g0b1xx.h"
#elif defined(STM32G0C1xx)
#include "stm32g0c1xx.h"
#elif defined(STM32G0B0xx)
#include "stm32g0b0xx.h"
#elif defined(STM32G071xx)
#include "stm32g071xx.h"
#elif defined(STM32G081xx)
#include "stm32g081xx.h"
#elif defined(STM32G070xx)
#include "stm32g070xx.h"
#elif defined(STM32G031xx)
#include "stm32g031xx.h"
#elif defined(STM32G041xx)
#include "stm32g041xx.h"
#elif defined(STM32G030xx)
#include "stm32g030xx.h"
#elif defined(STM32G051xx)
#include "stm32g051xx.h"
#elif defined(STM32G061xx)
#include "stm32g061xx.h"
#elif defined(STM32G050xx)
#include "stm32g050xx.h"
#else
#error "Please select first the target STM32G0xx device used in your application (in stm32g0xx.h file)"
#endif
/**
* @}
*/
/** @addtogroup Exported_types
* @{
*/
typedef enum
{
RESET = 0,
SET = !RESET
} FlagStatus, ITStatus;
typedef enum
{
DISABLE = 0,
ENABLE = !DISABLE
} FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
typedef enum
{
SUCCESS = 0,
ERROR = !SUCCESS
} ErrorStatus;
/**
* @}
*/
/** @addtogroup Exported_macros
* @{
*/
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
#define READ_BIT(REG, BIT) ((REG) & (BIT))
#define CLEAR_REG(REG) ((REG) = (0x0))
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
#define READ_REG(REG) ((REG))
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
/* Use of interrupt control for register exclusive access */
/* Atomic 32-bit register access macro to set one or several bits */
#define ATOMIC_SET_BIT(REG, BIT) \
do { \
uint32_t primask; \
primask = __get_PRIMASK(); \
__set_PRIMASK(1); \
SET_BIT((REG), (BIT)); \
__set_PRIMASK(primask); \
} while(0)
/* Atomic 32-bit register access macro to clear one or several bits */
#define ATOMIC_CLEAR_BIT(REG, BIT) \
do { \
uint32_t primask; \
primask = __get_PRIMASK(); \
__set_PRIMASK(1); \
CLEAR_BIT((REG), (BIT)); \
__set_PRIMASK(primask); \
} while(0)
/* Atomic 32-bit register access macro to clear and set one or several bits */
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
do { \
uint32_t primask; \
primask = __get_PRIMASK(); \
__set_PRIMASK(1); \
MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \
__set_PRIMASK(primask); \
} while(0)
/* Atomic 16-bit register access macro to set one or several bits */
#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT) \
/* Atomic 16-bit register access macro to clear one or several bits */
#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT) \
/* Atomic 16-bit register access macro to clear and set one or several bits */
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
/*#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))*/
/**
* @}
*/
#if defined (USE_HAL_DRIVER)
#include "stm32g0xx_hal.h"
#endif /* USE_HAL_DRIVER */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* STM32G0xx_H */
/**
* @}
*/
/**
* @}
*/
firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include/system_stm32g0xx.h
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/**
******************************************************************************
* @file system_stm32g0xx.h
* @author MCD Application Team
* @brief CMSIS Cortex-M0+ Device System Source File for STM32G0xx devices.
******************************************************************************
* @attention
*
* Copyright (c) 2018-2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32g0xx_system
* @{
*/
/**
* @brief Define to prevent recursive inclusion
*/
#ifndef SYSTEM_STM32G0XX_H
#define SYSTEM_STM32G0XX_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup STM32G0xx_System_Includes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Exported_types
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
extern const uint32_t AHBPrescTable[16]; /*!< AHB prescalers table values */
extern const uint32_t APBPrescTable[8]; /*!< APB prescalers table values */
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Exported_Constants
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Exported_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G0xx_System_Exported_Functions
* @{
*/
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /*SYSTEM_STM32G0XX_H */
/**
* @}
*/
/**
* @}
*/
firmware/Drivers/CMSIS/Device/ST/STM32G0xx/LICENSE.txt
+6
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This software component is provided to you as part of a software package and
applicable license terms are in the Package_license file. If you received this
software component outside of a package or without applicable license terms,
the terms of the Apache-2.0 license shall apply.
You may obtain a copy of the Apache-2.0 at:
https://opensource.org/licenses/Apache-2.0
firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/arm/startup_stm32g030xx.s
+234
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;******************************************************************************
;* File Name : startup_stm32g030xx.s
;* Author : MCD Application Team
;* Description : STM32G030xx devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM0 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;******************************************************************************
;* @attention
;*
;* Copyright (c) 2018-2021 STMicroelectronics.
;* All rights reserved.
;*
;* This software is licensed under terms that can be found in the LICENSE file
;* in the root directory of this software component.
;* If no LICENSE file comes with this software, it is provided AS-IS.
;*
;******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD 0 ; Reserved
DCD RTC_TAMP_IRQHandler ; RTC through EXTI Line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
DCD 0 ; Reserved
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
DCD DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler ; DMA1 Channel 4 to Channel 5, DMAMUX1 overrun
DCD ADC1_IRQHandler ; ADC1
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD 0 ; Reserved
DCD TIM3_IRQHandler ; TIM3
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD TIM14_IRQHandler ; TIM14
DCD 0 ; Reserved
DCD TIM16_IRQHandler ; TIM16
DCD TIM17_IRQHandler ; TIM17
DCD I2C1_IRQHandler ; I2C1
DCD I2C2_IRQHandler ; I2C2
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler routine
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT RTC_TAMP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_1_IRQHandler [WEAK]
EXPORT EXTI2_3_IRQHandler [WEAK]
EXPORT EXTI4_15_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
EXPORT DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM14_IRQHandler [WEAK]
EXPORT TIM16_IRQHandler [WEAK]
EXPORT TIM17_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT I2C2_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
WWDG_IRQHandler
RTC_TAMP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_1_IRQHandler
EXTI2_3_IRQHandler
EXTI4_15_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_3_IRQHandler
DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler
ADC1_IRQHandler
TIM1_BRK_UP_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM3_IRQHandler
TIM14_IRQHandler
TIM16_IRQHandler
TIM17_IRQHandler
I2C1_IRQHandler
I2C2_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/arm/startup_stm32g031xx.s
+244
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;******************************************************************************
;* File Name : startup_stm32g031xx.s
;* Author : MCD Application Team
;* Description : STM32G031xx devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM0 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;******************************************************************************
;* @attention
;*
;* Copyright (c) 2018-2021 STMicroelectronics.
;* All rights reserved.
;*
;* This software is licensed under terms that can be found in the LICENSE file
;* in the root directory of this software component.
;* If no LICENSE file comes with this software, it is provided AS-IS.
;*
;******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD RTC_TAMP_IRQHandler ; RTC through EXTI Line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
DCD 0 ; Reserved
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
DCD DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler ; DMA1 Channel 4 to Channel 5, DMAMUX1 overrun
DCD ADC1_IRQHandler ; ADC1
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD LPTIM1_IRQHandler ; LPTIM1
DCD LPTIM2_IRQHandler ; LPTIM2
DCD TIM14_IRQHandler ; TIM14
DCD 0 ; Reserved
DCD TIM16_IRQHandler ; TIM16
DCD TIM17_IRQHandler ; TIM17
DCD I2C1_IRQHandler ; I2C1
DCD I2C2_IRQHandler ; I2C2
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD LPUART1_IRQHandler ; LPUART1
DCD 0 ; Reserved
DCD 0 ; Reserved
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler routine
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT RTC_TAMP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_1_IRQHandler [WEAK]
EXPORT EXTI2_3_IRQHandler [WEAK]
EXPORT EXTI4_15_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
EXPORT DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT LPTIM1_IRQHandler [WEAK]
EXPORT LPTIM2_IRQHandler [WEAK]
EXPORT TIM14_IRQHandler [WEAK]
EXPORT TIM16_IRQHandler [WEAK]
EXPORT TIM17_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT I2C2_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
RTC_TAMP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_1_IRQHandler
EXTI2_3_IRQHandler
EXTI4_15_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_3_IRQHandler
DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler
ADC1_IRQHandler
TIM1_BRK_UP_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
LPTIM1_IRQHandler
LPTIM2_IRQHandler
TIM14_IRQHandler
TIM16_IRQHandler
TIM17_IRQHandler
I2C1_IRQHandler
I2C2_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
LPUART1_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/arm/startup_stm32g041xx.s
+246
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@@ -0,0 +1,246 @@
;******************************************************************************
;* File Name : startup_stm32g041xx.s
;* Author : MCD Application Team
;* Description : STM32G041xx devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM0 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;******************************************************************************
;* @attention
;*
;* Copyright (c) 2018-2021 STMicroelectronics.
;* All rights reserved.
;*
;* This software is licensed under terms that can be found in the LICENSE file
;* in the root directory of this software component.
;* If no LICENSE file comes with this software, it is provided AS-IS.
;*
;******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD RTC_TAMP_IRQHandler ; RTC through EXTI Line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
DCD 0 ; Reserved
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
DCD DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler ; DMA1 Channel 4 to Channel 5, DMAMUX1 overrun
DCD ADC1_IRQHandler ; ADC1
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD LPTIM1_IRQHandler ; LPTIM1
DCD LPTIM2_IRQHandler ; LPTIM2
DCD TIM14_IRQHandler ; TIM14
DCD 0 ; Reserved
DCD TIM16_IRQHandler ; TIM16
DCD TIM17_IRQHandler ; TIM17
DCD I2C1_IRQHandler ; I2C1
DCD I2C2_IRQHandler ; I2C2
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD LPUART1_IRQHandler ; LPUART1
DCD 0 ; Reserved
DCD AES_RNG_IRQHandler ; AES, RNG
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler routine
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT RTC_TAMP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_1_IRQHandler [WEAK]
EXPORT EXTI2_3_IRQHandler [WEAK]
EXPORT EXTI4_15_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
EXPORT DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT LPTIM1_IRQHandler [WEAK]
EXPORT LPTIM2_IRQHandler [WEAK]
EXPORT TIM14_IRQHandler [WEAK]
EXPORT TIM16_IRQHandler [WEAK]
EXPORT TIM17_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT I2C2_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
EXPORT AES_RNG_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
RTC_TAMP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_1_IRQHandler
EXTI2_3_IRQHandler
EXTI4_15_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_3_IRQHandler
DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler
ADC1_IRQHandler
TIM1_BRK_UP_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
LPTIM1_IRQHandler
LPTIM2_IRQHandler
TIM14_IRQHandler
TIM16_IRQHandler
TIM17_IRQHandler
I2C1_IRQHandler
I2C2_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
LPUART1_IRQHandler
AES_RNG_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/arm/startup_stm32g050xx.s
+237
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;******************************************************************************
;* File Name : startup_stm32g050xx.s
;* Author : MCD Application Team
;* Description : STM32G050xx devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM0 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;******************************************************************************
;* @attention
;*
;* Copyright (c) 2018-2021 STMicroelectronics.
;* All rights reserved.
;*
;* This software is licensed under terms that can be found in the LICENSE file
;* in the root directory of this software component.
;* If no LICENSE file comes with this software, it is provided AS-IS.
;*
;******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD 0 ; Reserved
DCD RTC_TAMP_IRQHandler ; RTC through EXTI Line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
DCD 0 ; Reserved
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
DCD DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler ; DMA1 Channel 4 to Channel 7, DMAMUX1 overrun
DCD ADC1_IRQHandler ; ADC1
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD 0 ; Reserved
DCD TIM3_IRQHandler ; TIM3
DCD TIM6_IRQHandler ; TIM6
DCD TIM7_IRQHandler ; TIM7
DCD TIM14_IRQHandler ; TIM14
DCD TIM15_IRQHandler ; TIM15
DCD TIM16_IRQHandler ; TIM16
DCD TIM17_IRQHandler ; TIM17
DCD I2C1_IRQHandler ; I2C1
DCD I2C2_IRQHandler ; I2C2
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler routine
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT RTC_TAMP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_1_IRQHandler [WEAK]
EXPORT EXTI2_3_IRQHandler [WEAK]
EXPORT EXTI4_15_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
EXPORT DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM6_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT TIM14_IRQHandler [WEAK]
EXPORT TIM15_IRQHandler [WEAK]
EXPORT TIM16_IRQHandler [WEAK]
EXPORT TIM17_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT I2C2_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
WWDG_IRQHandler
RTC_TAMP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_1_IRQHandler
EXTI2_3_IRQHandler
EXTI4_15_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_3_IRQHandler
DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
ADC1_IRQHandler
TIM1_BRK_UP_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM3_IRQHandler
TIM6_IRQHandler
TIM7_IRQHandler
TIM14_IRQHandler
TIM15_IRQHandler
TIM16_IRQHandler
TIM17_IRQHandler
I2C1_IRQHandler
I2C2_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/arm/startup_stm32g051xx.s
+246
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@@ -0,0 +1,246 @@
;******************************************************************************
;* File Name : startup_stm32g051xx.s
;* Author : MCD Application Team
;* Description : STM32G051xx devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM0 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;******************************************************************************
;* @attention
;*
;* Copyright (c) 2018-2021 STMicroelectronics.
;* All rights reserved.
;*
;* This software is licensed under terms that can be found in the LICENSE file
;* in the root directory of this software component.
;* If no LICENSE file comes with this software, it is provided AS-IS.
;*
;******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD RTC_TAMP_IRQHandler ; RTC through EXTI Line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
DCD 0 ; Reserved
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
DCD DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler ; DMA1 Channel 4 to Channel 7, DMAMUX1 overrun
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM6_DAC_LPTIM1_IRQHandler ; TIM6, DAC & LPTIM1
DCD TIM7_LPTIM2_IRQHandler ; TIM7 & LPTIM2
DCD TIM14_IRQHandler ; TIM14
DCD TIM15_IRQHandler ; TIM15
DCD TIM16_IRQHandler ; TIM16
DCD TIM17_IRQHandler ; TIM17
DCD I2C1_IRQHandler ; I2C1
DCD I2C2_IRQHandler ; I2C2
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD LPUART1_IRQHandler ; LPUART1
DCD 0 ; Reserved
DCD 0 ; Reserved
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler routine
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT RTC_TAMP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_1_IRQHandler [WEAK]
EXPORT EXTI2_3_IRQHandler [WEAK]
EXPORT EXTI4_15_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
EXPORT DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler [WEAK]
EXPORT ADC1_COMP_IRQHandler [WEAK]
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM6_DAC_LPTIM1_IRQHandler [WEAK]
EXPORT TIM7_LPTIM2_IRQHandler [WEAK]
EXPORT TIM14_IRQHandler [WEAK]
EXPORT TIM15_IRQHandler [WEAK]
EXPORT TIM16_IRQHandler [WEAK]
EXPORT TIM17_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT I2C2_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
RTC_TAMP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_1_IRQHandler
EXTI2_3_IRQHandler
EXTI4_15_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_3_IRQHandler
DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
ADC1_COMP_IRQHandler
TIM1_BRK_UP_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM6_DAC_LPTIM1_IRQHandler
TIM7_LPTIM2_IRQHandler
TIM14_IRQHandler
TIM15_IRQHandler
TIM16_IRQHandler
TIM17_IRQHandler
I2C1_IRQHandler
I2C2_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
LPUART1_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/arm/startup_stm32g061xx.s
+248
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@@ -0,0 +1,248 @@
;******************************************************************************
;* File Name : startup_stm32g061xx.s
;* Author : MCD Application Team
;* Description : STM32G061xx devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM0 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;******************************************************************************
;* @attention
;*
;* Copyright (c) 2018-2021 STMicroelectronics.
;* All rights reserved.
;*
;* This software is licensed under terms that can be found in the LICENSE file
;* in the root directory of this software component.
;* If no LICENSE file comes with this software, it is provided AS-IS.
;*
;******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD RTC_TAMP_IRQHandler ; RTC through EXTI Line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
DCD 0 ; Reserved
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
DCD DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler ; DMA1 Channel 4 to Channel 7, DMAMUX1 overrun
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM6_DAC_LPTIM1_IRQHandler ; TIM6, DAC & LPTIM1
DCD TIM7_LPTIM2_IRQHandler ; TIM7 & LPTIM2
DCD TIM14_IRQHandler ; TIM14
DCD TIM15_IRQHandler ; TIM15
DCD TIM16_IRQHandler ; TIM16
DCD TIM17_IRQHandler ; TIM17
DCD I2C1_IRQHandler ; I2C1
DCD I2C2_IRQHandler ; I2C2
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD LPUART1_IRQHandler ; LPUART1
DCD 0 ; Reserved
DCD AES_RNG_IRQHandler ; AES, RNG
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler routine
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT RTC_TAMP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_1_IRQHandler [WEAK]
EXPORT EXTI2_3_IRQHandler [WEAK]
EXPORT EXTI4_15_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
EXPORT DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler [WEAK]
EXPORT ADC1_COMP_IRQHandler [WEAK]
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM6_DAC_LPTIM1_IRQHandler [WEAK]
EXPORT TIM7_LPTIM2_IRQHandler [WEAK]
EXPORT TIM14_IRQHandler [WEAK]
EXPORT TIM15_IRQHandler [WEAK]
EXPORT TIM16_IRQHandler [WEAK]
EXPORT TIM17_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT I2C2_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
EXPORT AES_RNG_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
RTC_TAMP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_1_IRQHandler
EXTI2_3_IRQHandler
EXTI4_15_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_3_IRQHandler
DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
ADC1_COMP_IRQHandler
TIM1_BRK_UP_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM6_DAC_LPTIM1_IRQHandler
TIM7_LPTIM2_IRQHandler
TIM14_IRQHandler
TIM15_IRQHandler
TIM16_IRQHandler
TIM17_IRQHandler
I2C1_IRQHandler
I2C2_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
LPUART1_IRQHandler
AES_RNG_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END

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